M-Labs/artiq-zynq
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more conservative RTIO PLL reset timing

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This commit is contained in:
Sebastien Bourdeauducq 2020-07-20 14:19:13 +08:00
parent db2a8e7726
commit d65e893d1c
1 changed files with 10 additions and 1 deletions
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11
src/runtime/src/main.rs
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@ -116,11 +116,20 @@ fn init_rtio(timer: GlobalTimer, cfg: &config::Config) {
unsafe { unsafe {
pl::csr::rtio_crg::pll_reset_write(1); pl::csr::rtio_crg::pll_reset_write(1);
pl::csr::rtio_crg::clock_sel_write(clock_sel); pl::csr::rtio_crg::clock_sel_write(clock_sel);
}
let mut countdown = timer.countdown();
countdown.start(Milliseconds(2));
nb::block!(countdown.wait()).unwrap();
unsafe {
pl::csr::rtio_crg::pll_reset_write(0); pl::csr::rtio_crg::pll_reset_write(0);
} }
let mut countdown = timer.countdown(); let mut countdown = timer.countdown();
countdown.start(Milliseconds(1)); countdown.start(Milliseconds(2));
nb::block!(countdown.wait()).unwrap(); nb::block!(countdown.wait()).unwrap();
let locked = unsafe { pl::csr::rtio_crg::pll_locked_read() != 0 }; let locked = unsafe { pl::csr::rtio_crg::pll_locked_read() != 0 };
if !locked { if !locked {
panic!("RTIO PLL failed to lock"); panic!("RTIO PLL failed to lock");