diff --git a/src/gateware/kasli_soc.py b/src/gateware/kasli_soc.py
index 1204b0d..e355c16 100755
--- a/src/gateware/kasli_soc.py
+++ b/src/gateware/kasli_soc.py
@@ -311,7 +311,7 @@ class GenericMaster(SoCCore):
         self.submodules.routing_table = rtio.RoutingTableAccess(self.cri_con)
         self.csr_devices.append("routing_table")
 
-        self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.rtio_core.cri,
+        self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.cri_con.switch.slave,
                                                           self.ps7.s_axi_hp1)
         self.csr_devices.append("rtio_analyzer")
 
diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py
index 85730ea..aabe546 100755
--- a/src/gateware/zc706.py
+++ b/src/gateware/zc706.py
@@ -320,7 +320,7 @@ class _MasterBase(SoCCore):
         self.submodules.rtio_moninj = rtio.MonInj(rtio_channels)
         self.csr_devices.append("rtio_moninj")
 
-        self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.rtio_core.cri,
+        self.submodules.rtio_analyzer = analyzer.Analyzer(self.rtio_tsc, self.cri_con.switch.slave,
                                                           self.ps7.s_axi_hp1)
         self.csr_devices.append("rtio_analyzer")