rtio_clocking: added si5324 bypass
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@ -35,6 +35,7 @@ fn get_rtio_clock_cfg(cfg: &Config) -> RtioClock {
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}
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}
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else {
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info!("error reading configuration. Using default internal 125MHz clock");
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RtioClock::Int_125
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}
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}
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@ -105,16 +106,22 @@ fn setup_si5324(timer: &mut GlobalTimer, clk: RtioClock) {
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crystal_ref: true
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});
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}
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let si5324_ref_input = si5324::Input::Ckin2;
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si5324::setup(unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() },
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&si5324_settings.unwrap(), si5324::Input::Ckin2, timer).expect("cannot initialize Si5324");
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&si5324_settings.unwrap(), si5324_ref_input, timer).expect("cannot initialize Si5324");
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}
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pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
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let clk = get_rtio_clock_cfg(cfg);
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#[cfg(has_si5324)]
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setup_si5324(timer, clk);
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{
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let si5324_ext_input = si5324::Input::Ckin2;
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match clk {
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RtioClock::Ext0_Bypass => si5324::bypass(si5324_ext_input).expect("cannot bypass Si5324"),
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_ => setup_si5324(timer, clk),
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}
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}
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#[cfg(has_drtio)]
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init_drtio(timer);
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