cleanup, reword comment

pull/199/head
mwojcik 2022-10-21 17:18:48 +08:00
parent d080c65519
commit c6d173a5c5
5 changed files with 18 additions and 6 deletions

View File

@ -442,7 +442,7 @@ pub fn main(timer: GlobalTimer, cfg: Config) {
}
mgmt::start(cfg);
task::spawn(async move {
let connection = Rc::new(Semaphore::new(1, 1));
let terminate = Rc::new(Semaphore::new(0, 1));

View File

@ -9,7 +9,7 @@ use libcortex_a9::{
enable_fpu,
cache::{dcci_slice, iciallu, bpiall},
asm::{dsb, isb},
sync_channel
sync_channel,
};
use libboard_zynq::{mpcore, gic};
use libsupport_zynq::ram;

View File

@ -120,10 +120,10 @@ pub fn main_core0() {
Config::new_dummy()
}
};
task::spawn(report_async_rtio_errors());
rtio_clocking::init(&mut timer, &cfg);
comms::main(timer, cfg);
task::spawn(report_async_rtio_errors());
}
comms::main(timer, cfg);
}

View File

@ -56,7 +56,7 @@ fn panic(info: &core::panic::PanicInfo) -> ! {
}
fn soft_panic(info: &core::panic::PanicInfo) -> ! {
// log panic info to log (prints not visible in coremgmt logs)
// write panic info to log, so coremgmt can also read it
if let Some(location) = info.location() {
error!("panic at {}:{}:{}", location.file(), location.line(), location.column());
} else {

View File

@ -9,6 +9,7 @@ use libboard_zynq::i2c::I2c;
use crate::i2c;
#[cfg(has_si5324)]
use libboard_artiq::si5324;
#[derive(Debug, PartialEq, Copy, Clone)]
#[allow(non_camel_case_types)]
pub enum RtioClock {
@ -21,6 +22,7 @@ pub enum RtioClock {
Ext0_Synth0_100to125,
Ext0_Synth0_125to125,
}
#[allow(unreachable_code)]
fn get_rtio_clock_cfg(cfg: &Config) -> RtioClock {
let mut res = RtioClock::Default;
@ -63,6 +65,8 @@ fn get_rtio_clock_cfg(cfg: &Config) -> RtioClock {
}
res
}
fn init_rtio(timer: &mut GlobalTimer, _clk: RtioClock) {
#[cfg(has_rtio_crg_clock_sel)]
let clock_sel = match _clk {
@ -79,6 +83,7 @@ fn init_rtio(timer: &mut GlobalTimer, _clk: RtioClock) {
0
}
};
unsafe {
pl::csr::rtio_crg::pll_reset_write(1);
#[cfg(has_rtio_crg_clock_sel)]
@ -92,10 +97,12 @@ fn init_rtio(timer: &mut GlobalTimer, _clk: RtioClock) {
} else {
panic!("RTIO PLL failed to lock");
}
unsafe {
pl::csr::rtio_core::reset_phy_write(1);
}
}
#[cfg(has_drtio)]
fn init_drtio(timer: &mut GlobalTimer)
{
@ -107,6 +114,7 @@ fn init_drtio(timer: &mut GlobalTimer)
pl::csr::drtio_transceiver::txenable_write(0xffffffffu32 as _);
}
}
#[cfg(has_si5324)]
fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
let (si5324_settings, si5324_ref_input) = match clk {
@ -225,7 +233,9 @@ fn setup_si5324(i2c: &mut I2c, timer: &mut GlobalTimer, clk: RtioClock) {
};
si5324::setup(i2c, &si5324_settings, si5324_ref_input, timer).expect("cannot initialize Si5324");
}
pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
let clk = get_rtio_clock_cfg(cfg);
#[cfg(has_si5324)]
{
@ -238,5 +248,7 @@ pub fn init(timer: &mut GlobalTimer, cfg: &Config) {
}
#[cfg(has_drtio)]
init_drtio(timer);
init_rtio(timer, clk);
}