use openocd files from zynq-rs

local_run.sh

@@ -21,19 +21,21 @@ done
 
 load_bitstream_cmd=""
 
-cd openocd
+build_dir=`pwd`/build
+result_dir=`pwd`/result
+cd $OPENOCD_ZYNQ
 if [ $impure -eq 1 ]; then
     if [ $load_bitstream -eq 1 ]; then
-        load_bitstream_cmd="-g ../build/gateware/top.bit"
+        load_bitstream_cmd="-g $build_dir/gateware/top.bit"
     fi
-    openocd -f zc706.cfg -c "load_image ../build/firmware/armv7-none-eabihf/debug/szl; resume 0; exit"
+    openocd -f zc706.cfg -c "load_image $build_dir/firmware/armv7-none-eabihf/debug/szl; resume 0; exit"
     sleep 5
-    artiq_netboot $load_bitstream_cmd -f ../build/runtime.bin -b $board_host
+    artiq_netboot $load_bitstream_cmd -f $build_dir/runtime.bin -b $board_host
 else
     if [ $load_bitstream -eq 1 ]; then
-        load_bitstream_cmd="-g ../result/top.bit"
+        load_bitstream_cmd="-g $result_dir/top.bit"
     fi
-    openocd -f zc706.cfg -c "load_image ../result/szl.elf; resume 0; exit"
+    openocd -f zc706.cfg -c "load_image $result_dir/szl.elf; resume 0; exit"
     sleep 5
-    artiq_netboot $load_bitstream_cmd -f ../result/runtime.bin -b $board_host
+    artiq_netboot $load_bitstream_cmd -f $result_dir/runtime.bin -b $board_host
 fi

openocd/zc706.cfg

@@ -1,40 +0,0 @@
-source [find interface/ftdi/olimex-arm-usb-tiny-h.cfg]
-adapter_khz 1000
-
-set PL_TAPID 0x23731093
-set SMP 1
-
-source ./zynq-7000.cfg
-
-reset_config srst_only srst_open_drain
-adapter_nsrst_assert_width 250
-adapter_nsrst_delay 400
-
-set XC7_JSHUTDOWN 0x0d
-set XC7_JPROGRAM 0x0b
-set XC7_JSTART 0x0c
-set XC7_BYPASS 0x3f
-
-proc xc7_program {tap} {
-    global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
-    irscan $tap $XC7_JSHUTDOWN
-    irscan $tap $XC7_JPROGRAM
-    runtest 60000
-    #JSTART prevents this from working...
-    #irscan $tap $XC7_JSTART
-    runtest 2000
-    irscan $tap $XC7_BYPASS
-    runtest 2000
-}
-
-pld device virtex2 zynq.tap 1
-init
-xc7_program zynq.tap
-
-reset halt
-
-# Disable MMU
-targets $_TARGETNAME_1
-arm mcr 15 0 1 0 0 [expr [arm mrc 15 0 1 0 0] & ~0xd]
-targets $_TARGETNAME_0
-arm mcr 15 0 1 0 0 [expr [arm mrc 15 0 1 0 0] & ~0xd]

openocd/zynq-7000.cfg

@@ -1,95 +0,0 @@
-#
-# Xilinx Zynq 7000 SoC
-#
-#  Chris Johns <chrisj@rtems.org>
-#
-# Setup
-# -----
-#
-# Create a user configuration following the "Configuration Basics" in the user
-# documentation. In the file have:
-#
-#    source [find interface/ftdi/flyswatter2.cfg]
-#    source [find board/zynq-zc706-eval.cfg]
-#    adapter_khz 2000
-#    init
-#
-
-if { [info exists CHIPNAME] } {
-    global _CHIPNAME
-    set _CHIPNAME $CHIPNAME
-} else {
-    global _CHIPNAME
-    set _CHIPNAME zynq
-}
-
-if { [info exists ENDIAN] } {
-    set _ENDIAN $ENDIAN
-} else {
-    # this defaults to a bigendian
-    set _ENDIAN little
-}
-
-if { [info exists SMP] } {
-    global _SMP
-    set _SMP 1
-} else {
-    global _SMP
-    set _SMP 0
-}
-
-#
-# PL Tap.
-#
-# See ug585 ZYNQ-7000 TRM PSS_IDCODE for how this number is constructed.
-#   0x03731093 - ZC706 Eval board 1.1
-#   0x23731093 - ??
-#   0x23727093 - Zedboard Rev. C and D
-#
-# Set in your configuration file or board specific file.
-#
-if { [info exists PL_TAPID] } {
-    set _PL_TAPID $PL_TAPID
-} else {
-    set _PL_TAPID 0x03731093
-}
-
-jtag newtap $_CHIPNAME tap -irlen 6 -ircapture 0x001 -irmask 0x003 \
-    -expected-id $_PL_TAPID
-
-#
-# CoreSight Debug Access Port
-#
-if { [info exists DAP_TAPID] } {
-    set _DAP_TAPID $DAP_TAPID
-} else {
-    set _DAP_TAPID 0x4ba00477
-}
-
-jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x03 \
-    -expected-id $_DAP_TAPID
-
-#
-# GDB target: Cortex-A9, using DAP, configuring only one core
-# Base addresses of cores:
-# core 0  -  0xF8890000
-# core 1  -  0xF8892000
-#
-# Read from the ROM table with the patch to read the nested table.
-#
-
-set _TARGETNAME_0 $_CHIPNAME.cpu.0
-set _TARGETNAME_1 $_CHIPNAME.cpu.1
-
-target create $_TARGETNAME_0 cortex_a -coreid 0 \
-    -endian $_ENDIAN \
-    -chain-position $_CHIPNAME.dap \
-    -dbgbase 0x80090000
-if { $_SMP } {
-    echo "Zynq CPU1."
-    target create $_TARGETNAME_1 cortex_a -coreid 1 \
-        -endian $_ENDIAN \
-        -chain-position $_CHIPNAME.dap \
-        -dbgbase 0x80092000
-    target smp $_TARGETNAME_0 $_TARGETNAME_1
-}

remote_run.sh

@@ -36,7 +36,7 @@ load_bitstream_cmd=""
 echo "Creating $target_folder..."
 ssh $sshopts $target_host "mkdir -p $target_folder"
 echo "Copying files..."
-rsync -e "ssh $sshopts" openocd/* $target_host:$target_folder
+rsync -e "ssh $sshopts" $OPENOCD_ZYNQ/* $target_host:$target_folder
 if [ $impure -eq 1 ]; then
     if [ $load_bitstream -eq 1 ]; then
         load_bitstream_cmd="-g build/gateware/top.bit"

shell.nix

@@ -1,6 +1,7 @@
 let
   pkgs = import <nixpkgs> { overlays = [ (import ./mozilla-overlay.nix) ]; };
   artiq-fast = <artiq-fast>;
+  zynq-rs = (import ./zynq-rs.nix { inherit pkgs; });
   rustPlatform = (import ./rustPlatform.nix { inherit pkgs; });
   artiqpkgs = import "${artiq-fast}/default.nix" { inherit pkgs; };
   vivado = import "${artiq-fast}/vivado.nix" { inherit pkgs; };
@@ -28,4 +29,5 @@ in
     ];
 
     XARGO_RUST_SRC = "${rustPlatform.rust.rustc.src}/src";
+    OPENOCD_ZYNQ = "${zynq-rs}/openocd";
   }

zynq-rs.nix

@@ -0,0 +1,7 @@
+{ pkgs }:
+
+pkgs.fetchgit {
+  url = "https://git.m-labs.hk/M-Labs/zynq-rs.git";
+  rev = "4e18368aaf59c29e703d5ecae6c0eb93ef89c2d2";
+  sha256 = "0jfnjn76pfq5wp6qnxhkqmvldv02cy60wyp1ikaj9n47p69cabj8";
+}