From ab3ac796554ceddc37950b987b910dcb62cba8cb Mon Sep 17 00:00:00 2001 From: mwojcik Date: Tue, 5 Oct 2021 15:50:16 +0200 Subject: [PATCH] zc706 nist clock: started rtio channel changes --- src/gateware/zc706.py | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py index 766cab5..33a69fc 100755 --- a/src/gateware/zc706.py +++ b/src/gateware/zc706.py @@ -163,10 +163,6 @@ class NIST_CLOCK(ZC706): rtio_channels = [] - for i in range(4): - phy = ttl_simple.Output(platform.request("user_led_33", i)) - self.submodules += phy - rtio_channels.append(rtio.Channel.from_phy(phy)) for i in range(16): if i % 4 == 3: @@ -183,16 +179,42 @@ class NIST_CLOCK(ZC706): self.submodules += phy rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512)) + # todo: figure out pins for that on zc706 + # phy = ttl_serdes_7series.InOut_8X(platform.request("user_sma_gpio_n_33")) + # self.submodules += phy + # rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=512)) + + # could check the LED # + phy = ttl_simple.Output(platform.request("user_led_33", 2)) + self.submodules += phy + rtio_channels.append(rtio.Channel.from_phy(phy)) + + ams101_dac = self.platform.request("ams101_dac", 0) + phy = ttl_simple.Output(ams101_dac.ldac) + self.submodules += phy + rtio_channels.append(rtio.Channel.from_phy(phy)) + phy = ttl_simple.ClockGen(platform.request("la32_p")) self.submodules += phy rtio_channels.append(rtio.Channel.from_phy(phy)) + phy = spi2.SPIMaster(ams101_dac) + self.submodules += phy + rtio_channels.append(rtio.Channel.from_phy( + phy, ififo_depth=4)) + for i in range(3): phy = spi2.SPIMaster(self.platform.request("spi", i)) self.submodules += phy rtio_channels.append(rtio.Channel.from_phy( phy, ififo_depth=128)) + # todo check sdcard spi pins on zc706 (if applicable) + # phy = spi2.SPIMaster(platform.request("sdcard_spi_33")) + # self.submodules += phy + # rtio_channels.append(rtio.Channel.from_phy( + # phy, ififo_depth=4)) + phy = dds.AD9914(platform.request("dds"), 11, onehot=True) self.submodules += phy rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))