M-Labs
/
artiq-zynq
10
1
Fork 19
Code Issues 13 Pull Requests Releases Wiki Activity

sharing link.x with runtime

This commit is contained in:
mwojcik 2021-10-07 08:33:52 +02:00
parent d874115f29
commit a3a6156db1
2 changed files with 2 additions and 88 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/satman/build.rs
View File

@ -10,12 +10,12 @@ fn main() {
let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
File::create(out.join("link.x")) File::create(out.join("link.x"))
.unwrap() .unwrap()
.write_all(include_bytes!("link.x")) .write_all(include_bytes!("../runtime/link.x"))
.unwrap(); .unwrap();
println!("cargo:rustc-link-search={}", out.display()); println!("cargo:rustc-link-search={}", out.display());
// Only re-run the build script when link.x is changed, // Only re-run the build script when link.x is changed,
// instead of when any part of the source code changes. // instead of when any part of the source code changes.
println!("cargo:rerun-if-changed=link.x"); println!("cargo:rerun-if-changed=../runtime/link.x");
build_zynq::cfg(); build_zynq::cfg();
} }

86
src/satman/link.x
View File

@ -1,86 +0,0 @@
ENTRY(Reset);
MEMORY
{
SDRAM : ORIGIN = 0x00100000, LENGTH = 0x1FF00000
}
SECTIONS
{
__text_start = .;
.text :
{
KEEP(*(.text.exceptions));
*(.text.boot);
*(.text .text.*);
} > SDRAM
__text_end = .;
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > SDRAM
__exidx_end = .;
.ARM.extab :
{
* (.ARM.extab*)
} > SDRAM
.rodata : ALIGN(4)
{
*(.rodata .rodata.*);
} > SDRAM
.data : ALIGN(4)
{
*(.data .data.*);
} > SDRAM
.bss (NOLOAD) : ALIGN(4)
{
__bss_start = .;
*(.bss .bss.*);
. = ALIGN(4);
__bss_end = .;
} > SDRAM
.heap (NOLOAD) : ALIGN(8)
{
__heap0_start = .;
. += 0x8000000;
__heap0_end = .;
__heap1_start = .;
. += 0x8000000;
__heap1_end = .;
} > SDRAM
.stack1 (NOLOAD) : ALIGN(8)
{
__stack1_end = .;
. += 0x1000000;
__stack1_start = .;
} > SDRAM
.stack0 (NOLOAD) : ALIGN(8)
{
__stack0_end = .;
. += 0x20000;
__stack0_start = .;
} > SDRAM
.irq_stack1 (NOLOAD) : ALIGN(8)
{
__irq_stack1_end = .;
. += 0x100;
__irq_stack1_start = .;
} > SDRAM
.irq_stack0 (NOLOAD) : ALIGN(8)
{
__irq_stack0_end = .;
. += 0x100;
__irq_stack0_start = .;
} > SDRAM
}