M-Labs/artiq-zynq
10
1
Fork 19
Code Issues 12 Pull Requests Releases Wiki Activity

runtime: restored refcells for rtio_mgt

Browse Source
This commit is contained in:
mwojcik 2021-09-21 11:48:59 +02:00
parent da366b7a0d
commit 85e7784b91
2 changed files with 23 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/runtime/src/main.rs
View File

@ -11,6 +11,7 @@
extern crate alloc;
use core::cell::RefCell;
use log::{info, warn, error};
use libboard_zynq::{timer::GlobalTimer, mpcore, gic};
@ -184,10 +185,10 @@ pub fn main_core0() {
};
#[cfg(has_drtio)]
let drtio_routing_table = drtio_routing::config_routing_table(csr::DRTIO.len(), cfg);
let drtio_routing_table = RefCell::new(drtio_routing::config_routing_table(csr::DRTIO.len(), cfg));
#[cfg(not(has_drtio))]
let drtio_routing_table = drtio_routing::RoutingTable::default_empty();
let up_destinations = [false; drtio_routing::DEST_COUNT];
let drtio_routing_table = RefCell::new(drtio_routing::RoutingTable::default_empty());
let up_destinations = RefCell::new([false; drtio_routing::DEST_COUNT]);
#[cfg(has_drtio_routing)]
drtio_routing::interconnect_disable_all();
#[cfg(has_drtio)]

36
src/runtime/src/rtio_mgt.rs
View File

@ -1,4 +1,4 @@
use core::cell::RefCell;
use board_artiq::pl::csr;
#[cfg(has_drtio)]
use libboard_zynq::{timer::GlobalTimer, time::Milliseconds};
@ -13,14 +13,14 @@ pub mod drtio {
use drtioaux;
pub fn startup(aux_mutex: &Mutex,
routing_table: drtio_routing::RoutingTable,
up_destinations: [bool; drtio_routing::DEST_COUNT]) {
routing_table: &RefCell<drtio_routing::RoutingTable>,
up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>) {
let aux_mutex = aux_mutex.clone();
let routing_table = routing_table.clone();
let up_destinations = up_destinations.clone();
task::spawn( {
task::spawn( || {
let routing_table = routing_table.borrow();
link_thread(io, &aux_mutex, &routing_table, &up_destinations);
link_thread(&aux_mutex, &routing_table, &up_destinations);
});
}
@ -52,7 +52,7 @@ pub mod drtio {
timer: GlobalTimer) -> Result<drtioaux::Packet, &'static str> {
let _lock = aux_mutex.lock();
drtioaux::send(linkno, request).unwrap();
recv_aux_timeout(io, linkno, 200, timer)
recv_aux_timeout(linkno, 200, timer)
}
fn ping_remote(aux_mutex: &Mutex, linkno: u8, timer: GlobalTimer) -> u32 {
@ -65,7 +65,7 @@ pub mod drtio {
if count > 100 {
return 0;
}
let reply = aux_transact(io, aux_mutex, linkno, &drtioaux::Packet::EchoRequest, timer);
let reply = aux_transact(aux_mutex, linkno, &drtioaux::Packet::EchoRequest, timer);
match reply {
Ok(drtioaux::Packet::EchoReply) => {
// make sure receive buffer is drained
@ -91,7 +91,7 @@ pub mod drtio {
}
// TSCAck is the only aux packet that is sent spontaneously
// by the satellite, in response to a TSC set on the RT link.
let reply = recv_aux_timeout(io, linkno, 10000, timer)?;
let reply = recv_aux_timeout(linkno, 10000, timer)?;
if reply == drtioaux::Packet::TSCAck {
return Ok(());
} else {
@ -102,7 +102,7 @@ pub mod drtio {
fn load_routing_table(aux_mutex: &Mutex, linkno: u8, routing_table: &drtio_routing::RoutingTable,
timer: GlobalTimer) -> Result<(), &'static str> {
for i in 0..drtio_routing::DEST_COUNT {
let reply = aux_transact(io, aux_mutex, linkno, &drtioaux::Packet::RoutingSetPath {
let reply = aux_transact(aux_mutex, linkno, &drtioaux::Packet::RoutingSetPath {
destination: i as u8,
hops: routing_table.0[i]
}, timer)?;
@ -114,7 +114,7 @@ pub mod drtio {
}
fn set_rank(aux_mutex: &Mutex, linkno: u8, rank: u8, timer: GlobalTimer) -> Result<(), &'static str> {
let reply = aux_transact(io, aux_mutex, linkno, &drtioaux::Packet::RoutingSetRank {
let reply = aux_transact(aux_mutex, linkno, &drtioaux::Packet::RoutingSetRank {
rank: rank
}, timer)?;
if reply != drtioaux::Packet::RoutingAck {
@ -167,7 +167,7 @@ pub mod drtio {
}
fn destination_set_up(routing_table: &drtio_routing::RoutingTable,
up_destinations: [bool; drtio_routing::DEST_COUNT],
up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>,
destination: u8, up: bool) {
let mut up_destinations = up_destinations.borrow_mut();
up_destinations[destination as usize] = up;
@ -180,14 +180,14 @@ pub mod drtio {
}
}
fn destination_up(up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, destination: u8) -> bool {
fn destination_up(up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>, destination: u8) -> bool {
let up_destinations = up_destinations.borrow();
up_destinations[destination as usize]
}
fn destination_survey(io: &Io, aux_mutex: &Mutex, routing_table: &drtio_routing::RoutingTable,
up_links: &[bool],
up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>,
timer: GlobalTimer) {
for destination in 0..drtio_routing::DEST_COUNT {
let hop = routing_table.0[destination][0];
@ -243,7 +243,7 @@ pub mod drtio {
pub fn link_thread(io: Io, aux_mutex: &Mutex,
routing_table: &drtio_routing::RoutingTable,
up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>,
timer: GlobalTimer) {
let mut up_links = [false; csr::DRTIO.len()];
loop {
@ -319,8 +319,8 @@ pub mod drtio {
pub mod drtio {
use super::*;
pub fn startup(_aux_mutex: &Mutex, _routing_table: &Urc<RefCell<drtio_routing::RoutingTable>>,
_up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, _timer:GlobalTimer) {}
pub fn startup(_aux_mutex: &Mutex, _routing_table: &RefCell<drtio_routing::RoutingTable>,
_up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>, _timer:GlobalTimer) {}
pub fn reset(_aux_mutex: &Mutex, _timer: GlobalTimer) {}
}
@ -350,8 +350,8 @@ fn async_error_thread() {
}
pub fn startup(aux_mutex: &Mutex,
routing_table: &Urc<RefCell<drtio_routing::RoutingTable>>,
up_destinations: &Urc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, timer: GlobalTimer) {
routing_table: &RefCell<drtio_routing::RoutingTable>,
up_destinations: &RefCell<[bool; drtio_routing::DEST_COUNT]>, timer: GlobalTimer) {
drtio::startup(aux_mutex, routing_table, up_destinations, timer);
unsafe {
csr::rtio_core::reset_phy_write(1);