parent
35250b3f56
commit
83a5ed69d6
@ -1,123 +0,0 @@ |
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use core::cell::Cell; |
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use core::fmt::Write; |
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use log::{Log, LevelFilter}; |
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use log_buffer::LogBuffer; |
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use libcortex_a9::mutex::{Mutex, MutexGuard}; |
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use libboard_zynq::{println, timer::GlobalTimer}; |
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|
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pub struct LogBufferRef<'a> { |
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buffer: MutexGuard<'a, LogBuffer<&'static mut [u8]>>, |
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old_log_level: LevelFilter |
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} |
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|
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impl<'a> LogBufferRef<'a> { |
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fn new(buffer: MutexGuard<'a, LogBuffer<&'static mut [u8]>>) -> LogBufferRef<'a> { |
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let old_log_level = log::max_level(); |
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log::set_max_level(LevelFilter::Off); |
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LogBufferRef { buffer, old_log_level } |
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} |
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|
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pub fn is_empty(&self) -> bool { |
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self.buffer.is_empty() |
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} |
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|
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pub fn clear(&mut self) { |
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self.buffer.clear() |
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} |
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|
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pub fn extract(&mut self) -> &str { |
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self.buffer.extract() |
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} |
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} |
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|
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impl<'a> Drop for LogBufferRef<'a> { |
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fn drop(&mut self) { |
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log::set_max_level(self.old_log_level) |
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} |
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} |
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|
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pub struct BufferLogger { |
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buffer: Mutex<LogBuffer<&'static mut [u8]>>, |
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uart_filter: Cell<LevelFilter>, |
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buffer_filter: Cell<LevelFilter>, |
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} |
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|
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static mut LOGGER: Option<BufferLogger> = None; |
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|
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impl BufferLogger { |
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pub fn new(buffer: &'static mut [u8]) -> BufferLogger { |
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BufferLogger { |
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buffer: Mutex::new(LogBuffer::new(buffer)), |
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uart_filter: Cell::new(LevelFilter::Info), |
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buffer_filter: Cell::new(LevelFilter::Trace), |
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} |
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} |
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|
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pub fn register(self) { |
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unsafe { |
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LOGGER = Some(self); |
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log::set_logger(LOGGER.as_ref().unwrap()) |
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.expect("global logger can only be initialized once"); |
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} |
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} |
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|
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pub unsafe fn get_logger() -> &'static mut Option<BufferLogger> { |
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&mut LOGGER |
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} |
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|
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pub fn buffer<'a>(&'a self) -> Option<LogBufferRef<'a>> { |
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self.buffer |
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.try_lock() |
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.map(LogBufferRef::new) |
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} |
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|
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pub fn uart_log_level(&self) -> LevelFilter { |
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self.uart_filter.get() |
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} |
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|
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pub fn set_uart_log_level(&self, max_level: LevelFilter) { |
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self.uart_filter.set(max_level) |
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} |
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|
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pub fn buffer_log_level(&self) -> LevelFilter { |
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self.buffer_filter.get() |
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} |
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|
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/// this should be reserved for mgmt module
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pub fn set_buffer_log_level(&self, max_level: LevelFilter) { |
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self.buffer_filter.set(max_level) |
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} |
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} |
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|
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// required for impl Log
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unsafe impl Sync for BufferLogger {} |
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|
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impl Log for BufferLogger { |
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fn enabled(&self, _metadata: &log::Metadata) -> bool { |
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true |
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} |
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|
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fn log(&self, record: &log::Record) { |
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if self.enabled(record.metadata()) { |
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let timestamp = unsafe { |
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GlobalTimer::get() |
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}.get_us().0; |
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let seconds = timestamp / 1_000_000; |
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let micros = timestamp % 1_000_000; |
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|
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if record.level() <= self.buffer_log_level() { |
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let mut buffer = self.buffer.lock(); |
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writeln!(buffer, "[{:6}.{:06}s] {:>5}({}): {}", seconds, micros, |
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record.level(), record.target(), record.args()).unwrap(); |
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} |
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|
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if record.level() <= self.uart_log_level() { |
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println!("[{:6}.{:06}s] {:>5}({}): {}", seconds, micros, |
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record.level(), record.target(), record.args()); |
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} |
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} |
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} |
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|
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fn flush(&self) { |
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} |
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} |
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@ -1,158 +0,0 @@ |
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use core::str::Utf8Error; |
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use byteorder::{ByteOrder, NativeEndian}; |
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use alloc::vec; |
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use alloc::string::String; |
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use core_io::{Read, Write, Error as IoError}; |
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#[allow(dead_code)] |
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#[derive(Debug, Clone, PartialEq)] |
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pub enum ReadStringError<T> { |
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Utf8(Utf8Error), |
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Other(T) |
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} |
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|
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pub trait ProtoRead { |
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type ReadError; |
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fn read_exact(&mut self, buf: &mut [u8]) -> Result<(), Self::ReadError>; |
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#[inline] |
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fn read_u8(&mut self) -> Result<u8, Self::ReadError> { |
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let mut bytes = [0; 1]; |
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self.read_exact(&mut bytes)?; |
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Ok(bytes[0]) |
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} |
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|
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#[inline] |
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fn read_u16(&mut self) -> Result<u16, Self::ReadError> { |
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let mut bytes = [0; 2]; |
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self.read_exact(&mut bytes)?; |
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Ok(NativeEndian::read_u16(&bytes)) |
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} |
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|
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#[inline] |
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fn read_u32(&mut self) -> Result<u32, Self::ReadError> { |
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let mut bytes = [0; 4]; |
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self.read_exact(&mut bytes)?; |
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Ok(NativeEndian::read_u32(&bytes)) |
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} |
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|
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#[inline] |
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fn read_u64(&mut self) -> Result<u64, Self::ReadError> { |
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let mut bytes = [0; 8]; |
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self.read_exact(&mut bytes)?; |
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Ok(NativeEndian::read_u64(&bytes)) |
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} |
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#[inline] |
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fn read_bool(&mut self) -> Result<bool, Self::ReadError> { |
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Ok(self.read_u8()? != 0) |
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} |
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#[inline] |
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fn read_bytes(&mut self) -> Result<::alloc::vec::Vec<u8>, Self::ReadError> { |
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let length = self.read_u32()?; |
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let mut value = vec![0; length as usize]; |
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self.read_exact(&mut value)?; |
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Ok(value) |
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} |
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#[inline] |
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fn read_string(&mut self) -> Result<::alloc::string::String, ReadStringError<Self::ReadError>> { |
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let bytes = self.read_bytes().map_err(ReadStringError::Other)?; |
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String::from_utf8(bytes).map_err(|err| ReadStringError::Utf8(err.utf8_error())) |
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} |
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} |
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pub trait ProtoWrite { |
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type WriteError; |
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fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::WriteError>; |
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#[inline] |
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fn write_u8(&mut self, value: u8) -> Result<(), Self::WriteError> { |
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let bytes = [value; 1]; |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_i8(&mut self, value: i8) -> Result<(), Self::WriteError> { |
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let bytes = [value as u8; 1]; |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_u16(&mut self, value: u16) -> Result<(), Self::WriteError> { |
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let mut bytes = [0; 2]; |
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NativeEndian::write_u16(&mut bytes, value); |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_i16(&mut self, value: i16) -> Result<(), Self::WriteError> { |
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let mut bytes = [0; 2]; |
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NativeEndian::write_i16(&mut bytes, value); |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_u32(&mut self, value: u32) -> Result<(), Self::WriteError> { |
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let mut bytes = [0; 4]; |
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NativeEndian::write_u32(&mut bytes, value); |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_i32(&mut self, value: i32) -> Result<(), Self::WriteError> { |
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let mut bytes = [0; 4]; |
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NativeEndian::write_i32(&mut bytes, value); |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_u64(&mut self, value: u64) -> Result<(), Self::WriteError> { |
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let mut bytes = [0; 8]; |
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NativeEndian::write_u64(&mut bytes, value); |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_i64(&mut self, value: i64) -> Result<(), Self::WriteError> { |
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let mut bytes = [0; 8]; |
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NativeEndian::write_i64(&mut bytes, value); |
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self.write_all(&bytes) |
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} |
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#[inline] |
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fn write_bool(&mut self, value: bool) -> Result<(), Self::WriteError> { |
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self.write_u8(value as u8) |
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} |
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#[inline] |
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fn write_bytes(&mut self, value: &[u8]) -> Result<(), Self::WriteError> { |
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self.write_u32(value.len() as u32)?; |
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self.write_all(value) |
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} |
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#[inline] |
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fn write_string(&mut self, value: &str) -> Result<(), Self::WriteError> { |
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self.write_bytes(value.as_bytes()) |
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} |
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} |
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|
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impl<T> ProtoRead for T where T: Read + ?Sized { |
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type ReadError = IoError; |
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fn read_exact(&mut self, buf: &mut [u8]) -> Result<(), Self::ReadError> { |
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T::read_exact(self, buf) |
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} |
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} |
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impl<T> ProtoWrite for T where T: Write + ?Sized { |
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type WriteError = IoError; |
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fn write_all(&mut self, buf: &[u8]) -> Result<(), Self::WriteError> { |
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T::write_all(self, buf) |
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} |
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} |
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@ -0,0 +1,351 @@ |
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use core::cell::RefCell; |
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use alloc::rc::Rc; |
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use libboard_zynq::{timer::GlobalTimer, time::Milliseconds}; |
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use libboard_artiq::{pl::csr, drtio_routing}; |
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use libcortex_a9::mutex::Mutex; |
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#[cfg(has_drtio)] |
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pub mod drtio { |
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use super::*; |
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use libboard_artiq::drtioaux_async; |
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use libboard_artiq::drtioaux_async::Packet; |
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use libboard_artiq::drtioaux::Error; |
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use log::{warn, error, info}; |
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use embedded_hal::blocking::delay::DelayMs; |
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use libasync::{task, delay}; |
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pub fn startup(aux_mutex: &Rc<Mutex<bool>>, |
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routing_table: &Rc<RefCell<drtio_routing::RoutingTable>>, |
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up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, |
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timer: GlobalTimer) { |
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let aux_mutex = aux_mutex.clone(); |
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let routing_table = routing_table.clone(); |
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let up_destinations = up_destinations.clone(); |
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task::spawn(async move { |
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let routing_table = routing_table.borrow(); |
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link_thread(&aux_mutex, &routing_table, &up_destinations, timer).await; |
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}); |
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} |
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async fn link_rx_up(linkno: u8) -> bool { |
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let linkno = linkno as usize; |
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unsafe { |
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(csr::DRTIO[linkno].rx_up_read)() == 1 |
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} |
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} |
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async fn recv_aux_timeout(linkno: u8, timeout: u64, timer: GlobalTimer) -> Result<Packet, &'static str> { |
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if !link_rx_up(linkno).await { |
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return Err("link went down"); |
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} |
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match drtioaux_async::recv_timeout(linkno, Some(timeout), timer).await { |
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Ok(packet) => return Ok(packet), |
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Err(Error::TimedOut) => return Err("timed out"), |
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Err(_) => return Err("aux packet error"), |
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} |
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} |
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pub async fn aux_transact(aux_mutex: &Mutex<bool>, linkno: u8, request: &Packet, |
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timer: GlobalTimer) -> Result<Packet, &'static str> { |
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let _lock = aux_mutex.lock(); |
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drtioaux_async::send(linkno, request).await.unwrap(); |
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recv_aux_timeout(linkno, 200, timer).await |
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} |
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async fn drain_buffer(linkno: u8, draining_time: Milliseconds, timer: GlobalTimer) { |
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let max_time = timer.get_time() + draining_time; |
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loop { |
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if timer.get_time() > max_time { |
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return; |
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} //could this be cut short?
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let _ = drtioaux_async::recv(linkno).await; |
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} |
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} |
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async fn ping_remote(aux_mutex: &Rc<Mutex<bool>>, linkno: u8, timer: GlobalTimer) -> u32 { |
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let mut count = 0; |
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loop { |
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if !link_rx_up(linkno).await { |
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return 0 |
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} |
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count += 1; |
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if count > 100 { |
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return 0; |
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} |
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let reply = aux_transact(aux_mutex, linkno, &Packet::EchoRequest, timer).await; |
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match reply { |
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Ok(Packet::EchoReply) => { |
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// make sure receive buffer is drained
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let draining_time = Milliseconds(200); |
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drain_buffer(linkno, draining_time, timer).await; |
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return count; |
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} |
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_ => {} |
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} |
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} |
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} |
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async fn sync_tsc(aux_mutex: &Rc<Mutex<bool>>, linkno: u8, timer: GlobalTimer) -> Result<(), &'static str> { |
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let _lock = aux_mutex.lock(); |
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unsafe { |
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(csr::DRTIO[linkno as usize].set_time_write)(1); |
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while (csr::DRTIO[linkno as usize].set_time_read)() == 1 {} |
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} |
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// TSCAck is the only aux packet that is sent spontaneously
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// by the satellite, in response to a TSC set on the RT link.
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let reply = recv_aux_timeout(linkno, 10000, timer).await?; |
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if reply == Packet::TSCAck { |
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return Ok(()); |
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} else { |
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return Err("unexpected reply"); |
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} |
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} |
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async fn load_routing_table(aux_mutex: &Rc<Mutex<bool>>, linkno: u8, routing_table: &drtio_routing::RoutingTable, |
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timer: GlobalTimer) -> Result<(), &'static str> { |
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for i in 0..drtio_routing::DEST_COUNT { |
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let reply = aux_transact(aux_mutex, linkno, &Packet::RoutingSetPath { |
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destination: i as u8, |
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hops: routing_table.0[i] |
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}, timer).await?; |
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if reply != Packet::RoutingAck { |
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return Err("unexpected reply"); |
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} |
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} |
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Ok(()) |
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} |
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|
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async fn set_rank(aux_mutex: &Rc<Mutex<bool>>, linkno: u8, rank: u8, timer: GlobalTimer) -> Result<(), &'static str> { |
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let reply = aux_transact(aux_mutex, linkno, &Packet::RoutingSetRank { |
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rank: rank |
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}, timer).await?; |
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if reply != Packet::RoutingAck { |
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return Err("unexpected reply"); |
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} |
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Ok(()) |
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} |
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|
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async fn init_buffer_space(destination: u8, linkno: u8) { |
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let linkno = linkno as usize; |
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unsafe { |
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(csr::DRTIO[linkno].destination_write)(destination); |
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(csr::DRTIO[linkno].force_destination_write)(1); |
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(csr::DRTIO[linkno].o_get_buffer_space_write)(1); |
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while (csr::DRTIO[linkno].o_wait_read)() == 1 {} |
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info!("[DEST#{}] buffer space is {}", |
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destination, (csr::DRTIO[linkno].o_dbg_buffer_space_read)()); |
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(csr::DRTIO[linkno].force_destination_write)(0); |
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} |
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} |
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|
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async fn process_unsolicited_aux(aux_mutex: &Rc<Mutex<bool>>, linkno: u8) { |
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let _lock = aux_mutex.lock(); |
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match drtioaux_async::recv(linkno).await { |
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Ok(Some(packet)) => warn!("[LINK#{}] unsolicited aux packet: {:?}", linkno, packet), |
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Ok(None) => (), |
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Err(_) => warn!("[LINK#{}] aux packet error", linkno) |
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} |
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} |
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|
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async fn process_local_errors(linkno: u8) { |
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let errors; |
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let linkidx = linkno as usize; |
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unsafe { |
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errors = (csr::DRTIO[linkidx].protocol_error_read)(); |
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(csr::DRTIO[linkidx].protocol_error_write)(errors); |
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} |
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if errors != 0 { |
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error!("[LINK#{}] error(s) found (0x{:02x}):", linkno, errors); |
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if errors & 1 != 0 { |
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error!("[LINK#{}] received packet of an unknown type", linkno); |
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} |
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if errors & 2 != 0 { |
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error!("[LINK#{}] received truncated packet", linkno); |
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} |
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if errors & 4 != 0 { |
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error!("[LINK#{}] timeout attempting to get remote buffer space", linkno); |
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} |
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} |
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} |
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|
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async fn destination_set_up(routing_table: &drtio_routing::RoutingTable, |
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up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, |
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destination: u8, up: bool) { |
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let mut up_destinations = up_destinations.borrow_mut(); |
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up_destinations[destination as usize] = up; |
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if up { |
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drtio_routing::interconnect_enable(routing_table, 0, destination); |
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info!("[DEST#{}] destination is up", destination); |
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} else { |
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drtio_routing::interconnect_disable(destination); |
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info!("[DEST#{}] destination is down", destination); |
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} |
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} |
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|
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async fn destination_up(up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, destination: u8) -> bool { |
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let up_destinations = up_destinations.borrow(); |
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up_destinations[destination as usize] |
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} |
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|
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async fn destination_survey(aux_mutex: &Rc<Mutex<bool>>, routing_table: &drtio_routing::RoutingTable, |
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up_links: &[bool], |
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up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, |
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timer: GlobalTimer) { |
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for destination in 0..drtio_routing::DEST_COUNT { |
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let hop = routing_table.0[destination][0]; |
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let destination = destination as u8; |
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|
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if hop == 0 { |
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/* local RTIO */ |
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if !destination_up(up_destinations, destination).await { |
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destination_set_up(routing_table, up_destinations, destination, true).await; |
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} |
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} else if hop as usize <= csr::DRTIO.len() { |
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let linkno = hop - 1; |
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if destination_up(up_destinations, destination).await { |
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if up_links[linkno as usize] { |
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let reply = aux_transact(aux_mutex, linkno, &Packet::DestinationStatusRequest { |
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destination: destination |
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}, timer).await; |
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match reply { |
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Ok(Packet::DestinationDownReply) => |
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destination_set_up(routing_table, up_destinations, destination, false).await, |
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Ok(Packet::DestinationOkReply) => (), |
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Ok(Packet::DestinationSequenceErrorReply { channel }) => |
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error!("[DEST#{}] RTIO sequence error involving channel 0x{:04x}", destination, channel), |
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Ok(Packet::DestinationCollisionReply { channel }) => |
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error!("[DEST#{}] RTIO collision involving channel 0x{:04x}", destination, channel), |
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Ok(Packet::DestinationBusyReply { channel }) => |
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error!("[DEST#{}] RTIO busy error involving channel 0x{:04x}", destination, channel), |
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Ok(packet) => error!("[DEST#{}] received unexpected aux packet: {:?}", destination, packet), |
||||
Err(e) => error!("[DEST#{}] communication failed ({})", destination, e) |
||||
} |
||||
} else { |
||||
destination_set_up(routing_table, up_destinations, destination, false).await; |
||||
} |
||||
} else { |
||||
if up_links[linkno as usize] { |
||||
let reply = aux_transact(aux_mutex, linkno, &Packet::DestinationStatusRequest { |
||||
destination: destination |
||||
}, timer).await; |
||||
match reply { |
||||
Ok(Packet::DestinationDownReply) => (), |
||||
Ok(Packet::DestinationOkReply) => { |
||||
destination_set_up(routing_table, up_destinations, destination, true).await; |
||||
init_buffer_space(destination as u8, linkno).await; |
||||
}, |
||||
Ok(packet) => error!("[DEST#{}] received unexpected aux packet: {:?}", destination, packet), |
||||
Err(e) => error!("[DEST#{}] communication failed ({})", destination, e) |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
pub async fn link_thread(aux_mutex: &Rc<Mutex<bool>>, |
||||
routing_table: &drtio_routing::RoutingTable, |
||||
up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, |
||||
timer: GlobalTimer) { |
||||
let mut up_links = [false; csr::DRTIO.len()]; |
||||
loop { |
||||
for linkno in 0..csr::DRTIO.len() { |
||||
let linkno = linkno as u8; |
||||
if up_links[linkno as usize] { |
||||
/* link was previously up */ |
||||
if link_rx_up(linkno).await { |
||||
process_unsolicited_aux(aux_mutex, linkno).await; |
||||
process_local_errors(linkno).await; |
||||
} else { |
||||
info!("[LINK#{}] link is down", linkno); |
||||
up_links[linkno as usize] = false; |
||||
} |
||||
} else { |
||||
/* link was previously down */ |
||||
if link_rx_up(linkno).await { |
||||
info!("[LINK#{}] link RX became up, pinging", linkno); |
||||
let ping_count = ping_remote(aux_mutex, linkno, timer).await; |
||||
if ping_count > 0 { |
||||
info!("[LINK#{}] remote replied after {} packets", linkno, ping_count); |
||||
up_links[linkno as usize] = true; |
||||
if let Err(e) = sync_tsc(aux_mutex, linkno, timer).await { |
||||
error!("[LINK#{}] failed to sync TSC ({})", linkno, e); |
||||
} |
||||
if let Err(e) = load_routing_table(aux_mutex, linkno, routing_table, timer).await { |
||||
error!("[LINK#{}] failed to load routing table ({})", linkno, e); |
||||
} |
||||
if let Err(e) = set_rank(aux_mutex, linkno, 1 as u8, timer).await { |
||||
error!("[LINK#{}] failed to set rank ({})", linkno, e); |
||||
} |
||||
info!("[LINK#{}] link initialization completed", linkno); |
||||
} else { |
||||
error!("[LINK#{}] ping failed", linkno); |
||||
} |
||||
} |
||||
} |
||||
} |
||||
destination_survey(aux_mutex, routing_table, &up_links, up_destinations, timer).await; |
||||
let mut countdown = timer.countdown(); |
||||
delay(&mut countdown, Milliseconds(200)).await; |
||||
} |
||||
} |
||||
|
||||
#[allow(dead_code)] |
||||
pub fn reset(aux_mutex: Rc<Mutex<bool>>, mut timer: GlobalTimer) { |
||||
for linkno in 0..csr::DRTIO.len() { |
||||
unsafe { |
||||
(csr::DRTIO[linkno].reset_write)(1); |
||||
} |
||||
} |
||||
timer.delay_ms(1); |
||||
for linkno in 0..csr::DRTIO.len() { |
||||
unsafe { |
||||
(csr::DRTIO[linkno].reset_write)(0); |
||||
} |
||||
} |
||||
|
||||
for linkno in 0..csr::DRTIO.len() { |
||||
let linkno = linkno as u8; |
||||
if task::block_on(link_rx_up(linkno)) { |
||||
let reply = task::block_on(aux_transact(&aux_mutex, linkno, |
||||
&Packet::ResetRequest, timer)); |
||||
match reply { |
||||
Ok(Packet::ResetAck) => (), |
||||
Ok(_) => error!("[LINK#{}] reset failed, received unexpected aux packet", linkno), |
||||
Err(e) => error!("[LINK#{}] reset failed, aux packet error ({})", linkno, e) |
||||
} |
||||
} |
||||
} |
||||
} |
||||
} |
||||
|
||||
#[cfg(not(has_drtio))] |
||||
pub mod drtio { |
||||
use super::*; |
||||
|
||||
pub fn startup(_aux_mutex: &Rc<Mutex<bool>>, _routing_table: &Rc<RefCell<drtio_routing::RoutingTable>>, |
||||
_up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>, _timer: GlobalTimer) {} |
||||
|
||||
#[allow(dead_code)] |
||||
pub fn reset(_aux_mutex: Rc<Mutex<bool>>, mut _timer: GlobalTimer) {} |
||||
} |
||||
|
||||
pub fn startup(aux_mutex: &Rc<Mutex<bool>>, |
||||
routing_table: &Rc<RefCell<drtio_routing::RoutingTable>>, |
||||
up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
|
||||
timer: GlobalTimer) { |
||||
drtio::startup(aux_mutex, routing_table, up_destinations, timer); |
||||
unsafe { |
||||
csr::rtio_core::reset_phy_write(1); |
||||
} |
||||
} |
||||
|
||||
#[allow(dead_code)] |
||||
pub fn reset(aux_mutex: Rc<Mutex<bool>>, timer: GlobalTimer) { |
||||
unsafe { |
||||
csr::rtio_core::reset_write(1); |
||||
} |
||||
drtio::reset(aux_mutex, timer) |
||||
} |
||||
@ -1,273 +0,0 @@ |
||||
use core::result; |
||||
use log::info; |
||||
use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds}; |
||||
use embedded_hal::blocking::delay::DelayUs; |
||||
#[cfg(not(si5324_soft_reset))] |
||||
use pl::csr; |
||||
|
||||
type Result<T> = result::Result<T, &'static str>; |
||||
|
||||
const ADDRESS: u8 = 0x68; |
||||
|
||||
#[cfg(not(si5324_soft_reset))] |
||||
fn hard_reset(timer: GlobalTimer) { |
||||
unsafe { csr::si5324_rst_n::out_write(0); } |
||||
timer.delay_us(1_000); |
||||
unsafe { csr::si5324_rst_n::out_write(1); } |
||||
timer.delay_us(10_000); |
||||
} |
||||
|
||||
// NOTE: the logical parameters DO NOT MAP to physical values written
|
||||
// into registers. They have to be mapped; see the datasheet.
|
||||
// DSPLLsim reports the logical parameters in the design summary, not
|
||||
// the physical register values.
|
||||
pub struct FrequencySettings { |
||||
pub n1_hs: u8, |
||||
pub nc1_ls: u32, |
||||
pub n2_hs: u8, |
||||
pub n2_ls: u32, |
||||
pub n31: u32, |
||||
pub n32: u32, |
||||
pub bwsel: u8, |
||||
pub crystal_ref: bool |
||||
} |
||||
|
||||
pub enum Input { |
||||
Ckin1, |
||||
Ckin2, |
||||
} |
||||
|
||||
fn map_frequency_settings(settings: &FrequencySettings) -> Result<FrequencySettings> { |
||||
if settings.nc1_ls != 0 && (settings.nc1_ls % 2) == 1 { |
||||
return Err("NC1_LS must be 0 or even") |
||||
} |
||||
if settings.nc1_ls > (1 << 20) { |
||||
return Err("NC1_LS is too high") |
||||
} |
||||
if (settings.n2_ls % 2) == 1 { |
||||
return Err("N2_LS must be even") |
||||
} |
||||
if settings.n2_ls > (1 << 20) { |
||||
return Err("N2_LS is too high") |
||||
} |
||||
if settings.n31 > (1 << 19) { |
||||
return Err("N31 is too high") |
||||
} |
||||
if settings.n32 > (1 << 19) { |
||||
return Err("N32 is too high") |
||||
} |
||||
let r = FrequencySettings { |
||||
n1_hs: match settings.n1_hs { |
||||
4 => 0b000, |
||||
5 => 0b001, |
||||
6 => 0b010, |
||||
7 => 0b011, |
||||
8 => 0b100, |
||||
9 => 0b101, |
||||
10 => 0b110, |
||||
11 => 0b111, |
||||
_ => return Err("N1_HS has an invalid value") |
||||
}, |
||||
nc1_ls: settings.nc1_ls - 1, |
||||
n2_hs: match settings.n2_hs { |
||||
4 => 0b000, |
||||
5 => 0b001, |
||||
6 => 0b010, |
||||
7 => 0b011, |
||||
8 => 0b100, |
||||
9 => 0b101, |
||||
10 => 0b110, |
||||
11 => 0b111, |
||||
_ => return Err("N2_HS has an invalid value") |
||||
}, |
||||
n2_ls: settings.n2_ls - 1, |
||||
n31: settings.n31 - 1, |
||||
n32: settings.n32 - 1, |
||||
bwsel: settings.bwsel, |
||||
crystal_ref: settings.crystal_ref |
||||
}; |
||||
Ok(r) |
||||
} |
||||
|
||||
fn write(i2c: &mut I2c, reg: u8, val: u8) -> Result<()> { |
||||
i2c.start().unwrap(); |
||||
if !i2c.write(ADDRESS << 1).unwrap() { |
||||
return Err("Si5324 failed to ack write address") |
||||
} |
||||
if !i2c.write(reg).unwrap() { |
||||
return Err("Si5324 failed to ack register") |
||||
} |
||||
if !i2c.write(val).unwrap() { |
||||
return Err("Si5324 failed to ack value") |
||||
} |
||||
i2c.stop().unwrap(); |
||||
Ok(()) |
||||
} |
||||
|
||||
fn write_no_ack_value(i2c: &mut I2c, reg: u8, val: u8) -> Result<()> { |
||||
i2c.start().unwrap(); |
||||
if !i2c.write(ADDRESS << 1).unwrap() { |
||||
return Err("Si5324 failed to ack write address") |
||||
} |
||||
if !i2c.write(reg).unwrap() { |
||||
return Err("Si5324 failed to ack register") |
||||
} |
||||
i2c.write(val).unwrap(); |
||||
i2c.stop().unwrap(); |
||||
Ok(()) |
||||
} |
||||
|
||||
fn read(i2c: &mut I2c, reg: u8) -> Result<u8> { |
||||
i2c.start().unwrap(); |
||||
if !i2c.write(ADDRESS << 1).unwrap() { |
||||
return Err("Si5324 failed to ack write address") |
||||
} |
||||