M-Labs/artiq-zynq
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satellite: support optional args

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This commit is contained in:
mwojcik 2023-09-29 12:06:20 +08:00
parent 29cc0a6e28
commit 7263862fd8
2 changed files with 14 additions and 7 deletions
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1
src/libksupport/src/kernel/mod.rs
View File

@ -107,6 +107,7 @@ pub enum Message {
#[cfg(has_drtio)] #[cfg(has_drtio)]
SubkernelMsgRecvReply { SubkernelMsgRecvReply {
status: SubkernelStatus, status: SubkernelStatus,
count: u8,
}, },
} }

20
src/satman/src/subkernel.rs
View File

@ -65,6 +65,7 @@ pub struct Sliceable {
/* represents interkernel messages */ /* represents interkernel messages */
struct Message { struct Message {
count: u8,
tag: u8, tag: u8,
data: Vec<u8>, data: Vec<u8>,
} }
@ -181,8 +182,9 @@ impl MessageManager {
Some(message) => message.data.extend(&data[..length]), Some(message) => message.data.extend(&data[..length]),
None => { None => {
self.in_buffer = Some(Message { self.in_buffer = Some(Message {
tag: data[0], count: data[0],
data: data[1..length].to_vec(), tag: data[1],
data: data[2..length].to_vec(),
}); });
} }
}; };
@ -529,6 +531,7 @@ impl<'a> Manager<'_> {
if timer.get_time() > timeout { if timer.get_time() > timeout {
self.control.tx.send(kernel::Message::SubkernelMsgRecvReply { self.control.tx.send(kernel::Message::SubkernelMsgRecvReply {
status: kernel::SubkernelStatus::Timeout, status: kernel::SubkernelStatus::Timeout,
count: 0,
}); });
self.session.kernel_state = KernelState::Running; self.session.kernel_state = KernelState::Running;
return Ok(()); return Ok(());
@ -536,6 +539,7 @@ impl<'a> Manager<'_> {
if let Some(message) = self.session.messages.get_incoming() { if let Some(message) = self.session.messages.get_incoming() {
self.control.tx.send(kernel::Message::SubkernelMsgRecvReply { self.control.tx.send(kernel::Message::SubkernelMsgRecvReply {
status: kernel::SubkernelStatus::NoError, status: kernel::SubkernelStatus::NoError,
count: message.count,
}); });
self.session.kernel_state = KernelState::Running; self.session.kernel_state = KernelState::Running;
self.pass_message_to_kernel(&message, timer) self.pass_message_to_kernel(&message, timer)
@ -559,6 +563,7 @@ impl<'a> Manager<'_> {
fn pass_message_to_kernel(&mut self, message: &Message, timer: GlobalTimer) -> Result<(), Error> { fn pass_message_to_kernel(&mut self, message: &Message, timer: GlobalTimer) -> Result<(), Error> {
let mut reader = Cursor::new(&message.data); let mut reader = Cursor::new(&message.data);
let mut tag: [u8; 1] = [message.tag]; let mut tag: [u8; 1] = [message.tag];
let mut i = message.count;
loop { loop {
let slot = match recv_w_timeout(&mut self.control.rx, timer, 100)? { let slot = match recv_w_timeout(&mut self.control.rx, timer, 100)? {
kernel::Message::RpcRecvRequest(slot) => slot, kernel::Message::RpcRecvRequest(slot) => slot,
@ -601,11 +606,12 @@ impl<'a> Manager<'_> {
unexpected!("{}", unexpected); unexpected!("{}", unexpected);
} }
self.control.tx.send(kernel::Message::RpcRecvReply(Ok(0))); self.control.tx.send(kernel::Message::RpcRecvReply(Ok(0)));
match reader.read_u8() { i -= 1;
Ok(0) | Err(_) => break, // reached the end of data, we're done if i == 0 {
Ok(t) => { break;
tag[0] = t; } else {
} // update the tag for next read // update the tag for next read
tag[0] = reader.read_u8()?;
} }
} }
Ok(()) Ok(())