enabled cpu program flow prediction
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parent
5e4bf8bbf7
commit
5da76f2abb
@ -15,7 +15,7 @@ let
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version = "0.1.0";
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src = ./src;
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cargoSha256 = "1r8yjzixkknivawi286iyjjhaf5q8ll3a53q54dc9m9dhx20358b";
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cargoSha256 = "1m6sw200rq0d1x9g09f2004l74qv5ypa3s6q39y5pf1awj1zfq3i";
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nativeBuildInputs = [
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pkgs.gnumake
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10
src/Cargo.lock
generated
10
src/Cargo.lock
generated
@ -187,7 +187,7 @@ dependencies = [
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[[package]]
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name = "libasync"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#157439bc88cbb18bb40009428acf1fdee800e32e"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#08fd1391c523d9a2b1fe9986bff796e27779bcc4"
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dependencies = [
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"embedded-hal",
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"libcortex_a9",
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@ -199,7 +199,7 @@ dependencies = [
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[[package]]
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name = "libboard_zynq"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#157439bc88cbb18bb40009428acf1fdee800e32e"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#08fd1391c523d9a2b1fe9986bff796e27779bcc4"
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dependencies = [
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"bit_field",
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"embedded-hal",
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@ -233,7 +233,7 @@ dependencies = [
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[[package]]
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name = "libcortex_a9"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#157439bc88cbb18bb40009428acf1fdee800e32e"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#08fd1391c523d9a2b1fe9986bff796e27779bcc4"
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dependencies = [
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"bit_field",
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"libregister",
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@ -249,7 +249,7 @@ checksum = "c7d73b3f436185384286bd8098d17ec07c9a7d2388a6599f824d8502b529702a"
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[[package]]
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name = "libregister"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#157439bc88cbb18bb40009428acf1fdee800e32e"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#08fd1391c523d9a2b1fe9986bff796e27779bcc4"
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dependencies = [
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"bit_field",
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"vcell",
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@ -259,7 +259,7 @@ dependencies = [
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[[package]]
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name = "libsupport_zynq"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#157439bc88cbb18bb40009428acf1fdee800e32e"
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source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#08fd1391c523d9a2b1fe9986bff796e27779bcc4"
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dependencies = [
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"compiler_builtins",
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"libboard_zynq",
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