diff --git a/flake.nix b/flake.nix index 7ea06f2..013e8a8 100644 --- a/flake.nix +++ b/flake.nix @@ -11,6 +11,7 @@ pkgs = import artiq.inputs.nixpkgs { system = "x86_64-linux"; overlays = [ (import mozilla-overlay) ]; }; zynqpkgs = zynq-rs.packages.x86_64-linux; artiqpkgs = artiq.packages.x86_64-linux; + zynqRev = self.sourceInfo.rev or "unknown"; rustPlatform = zynq-rs.rustPlatform; @@ -147,6 +148,7 @@ pkgs.llvmPackages_9.clang-unwrapped ]; buildPhase = '' + export ZYNQ_REV=${zynqRev} export XARGO_RUST_SRC="${rustPlatform.rust.rustc}/lib/rustlib/src/rust/library" export CLANG_EXTRA_INCLUDE_DIR="${pkgs.llvmPackages_9.clang-unwrapped.lib}/lib/clang/9.0.1/include" export CARGO_HOME=$(mktemp -d cargo-home.XXX) @@ -173,6 +175,7 @@ ]; } '' + export ZYNQ_REV=${zynqRev} python ${./src/gateware}/${target}.py -g build ${if json == null then "-V ${variant}" else json} mkdir -p $out $out/nix-support cp build/top.bit $out @@ -369,6 +372,7 @@ artiqpkgs.vivado binutils-arm ]; + ZYNQ_REV="${zynqRev}"; XARGO_RUST_SRC = "${rustPlatform.rust.rustc}/lib/rustlib/src/rust/library"; CLANG_EXTRA_INCLUDE_DIR = "${pkgs.llvmPackages_9.clang-unwrapped.lib}/lib/clang/9.0.1/include"; OPENOCD_ZYNQ = "${zynq-rs}/openocd"; diff --git a/src/gateware/config.py b/src/gateware/config.py new file mode 100644 index 0000000..2a62733 --- /dev/null +++ b/src/gateware/config.py @@ -0,0 +1,10 @@ +import os +from artiq._version import get_version + + +def generate_ident(variant): + return "{}+{};{}".format( + get_version().split(".")[0], + os.getenv("ZYNQ_REV", default="unknown")[:8], + variant, + ) diff --git a/src/gateware/kasli_soc.py b/src/gateware/kasli_soc.py index bae58b5..a97e220 100755 --- a/src/gateware/kasli_soc.py +++ b/src/gateware/kasli_soc.py @@ -27,6 +27,7 @@ import dma import analyzer import acpki as acpki_lib import drtio_aux_controller +from config import generate_ident class RTIOCRG(Module, AutoCSR): def __init__(self, platform): @@ -120,7 +121,7 @@ class GenericStandalone(SoCCore): platform.toolchain.bitstream_commands.extend([ "set_property BITSTREAM.GENERAL.COMPRESS True [current_design]", ]) - ident = description["variant"] + ident = generate_ident(description["variant"]) if self.acpki: ident = "acpki_" + ident SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident) @@ -211,7 +212,7 @@ class GenericMaster(SoCCore): platform.toolchain.bitstream_commands.extend([ "set_property BITSTREAM.GENERAL.COMPRESS True [current_design]", ]) - ident = description["variant"] + ident = generate_ident(description["variant"]) if self.acpki: ident = "acpki_" + ident SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident) @@ -346,7 +347,7 @@ class GenericSatellite(SoCCore): platform.toolchain.bitstream_commands.extend([ "set_property BITSTREAM.GENERAL.COMPRESS True [current_design]", ]) - ident = description["variant"] + ident = generate_ident(description["variant"]) if self.acpki: ident = "acpki_" + ident SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident) diff --git a/src/gateware/zc706.py b/src/gateware/zc706.py index eb73eac..db7c852 100755 --- a/src/gateware/zc706.py +++ b/src/gateware/zc706.py @@ -25,6 +25,7 @@ import dma import analyzer import acpki import drtio_aux_controller +from config import generate_ident class RTIOCRG(Module, AutoCSR): @@ -147,7 +148,7 @@ class ZC706(SoCCore): platform = zc706.Platform() prepare_zc706_platform(platform) - ident = self.__class__.__name__ + ident = generate_ident(self.__class__.__name__) if self.acpki: ident = "acpki_" + ident SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident) @@ -200,7 +201,7 @@ class _MasterBase(SoCCore): platform = zc706.Platform() prepare_zc706_platform(platform) - ident = self.__class__.__name__ + ident = generate_ident(self.__class__.__name__) if self.acpki: ident = "acpki_" + ident SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident) @@ -335,7 +336,7 @@ class _SatelliteBase(SoCCore): platform = zc706.Platform() prepare_zc706_platform(platform) - ident = self.__class__.__name__ + ident = generate_ident(self.__class__.__name__) if self.acpki: ident = "acpki_" + ident SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)