M-Labs/artiq-zynq
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analyzer: report AXI bus errors

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Sebastien Bourdeauducq 2020-07-20 19:51:22 +08:00
parent 9a8f8e2d7b
commit 21135c6a41
2 changed files with 17 additions and 3 deletions
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6
src/gateware/analyzer.py
View File

@ -22,6 +22,7 @@ class AXIDMAWriter(Module, AutoCSR):
self.base_address = CSRStorage(aw, alignment_bits=alignment_bits) self.base_address = CSRStorage(aw, alignment_bits=alignment_bits)
self.last_address = CSRStorage(aw, alignment_bits=alignment_bits) self.last_address = CSRStorage(aw, alignment_bits=alignment_bits)
self.byte_count = CSRStatus(32) # only read when shut down self.byte_count = CSRStatus(32) # only read when shut down
self.bus_error = CSRStatus()
self.make_request = Signal() self.make_request = Signal()
self.sink = stream.Endpoint([("data", dw)]) self.sink = stream.Endpoint([("data", dw)])
@ -82,6 +83,11 @@ class AXIDMAWriter(Module, AutoCSR):
] ]
self.comb += membus.b.ready.eq(1) self.comb += membus.b.ready.eq(1)
self.sync += [
If(self.reset.re, self.bus_error.status.eq(0)),
If(membus.b.valid & membus.b.ready & (membus.b.resp != axi.Response.okay),
self.bus_error.status.eq(1))
]
class Analyzer(Module, AutoCSR): class Analyzer(Module, AutoCSR):

14
src/runtime/src/analyzer.rs
View File

@ -44,7 +44,7 @@ fn disarm() {
struct Header { struct Header {
sent_bytes: u32, sent_bytes: u32,
total_byte_count: u64, total_byte_count: u64,
overflow_occurred: bool, error_occurred: bool,
log_channel: u8, log_channel: u8,
dds_onehot_sel: bool dds_onehot_sel: bool
} }
@ -52,7 +52,7 @@ struct Header {
async fn write_header(stream: &mut TcpStream, header: &Header) -> Result<(), Error> { async fn write_header(stream: &mut TcpStream, header: &Header) -> Result<(), Error> {
write_i32(stream, header.sent_bytes as i32).await?; write_i32(stream, header.sent_bytes as i32).await?;
write_i64(stream, header.total_byte_count as i64).await?; write_i64(stream, header.total_byte_count as i64).await?;
write_i8(stream, header.overflow_occurred as i8).await?; write_i8(stream, header.error_occurred as i8).await?;
write_i8(stream, header.log_channel as i8).await?; write_i8(stream, header.log_channel as i8).await?;
write_i8(stream, header.dds_onehot_sel as i8).await?; write_i8(stream, header.dds_onehot_sel as i8).await?;
Ok(()) Ok(())
@ -63,14 +63,22 @@ async fn handle_connection(stream: &mut TcpStream) -> Result<(), Error> {
let data = unsafe { &BUFFER.data[..] }; let data = unsafe { &BUFFER.data[..] };
let overflow_occurred = unsafe { pl::csr::rtio_analyzer::message_encoder_overflow_read() != 0 }; let overflow_occurred = unsafe { pl::csr::rtio_analyzer::message_encoder_overflow_read() != 0 };
let bus_error_occurred = unsafe { pl::csr::rtio_analyzer::dma_bus_error_read() != 0 };
let total_byte_count = unsafe { pl::csr::rtio_analyzer::dma_byte_count_read() as u64 }; let total_byte_count = unsafe { pl::csr::rtio_analyzer::dma_byte_count_read() as u64 };
let pointer = (total_byte_count % BUFFER_SIZE as u64) as usize; let pointer = (total_byte_count % BUFFER_SIZE as u64) as usize;
let wraparound = total_byte_count >= BUFFER_SIZE as u64; let wraparound = total_byte_count >= BUFFER_SIZE as u64;
if overflow_occurred {
warn!("overflow occured");
}
if bus_error_occurred {
warn!("bus error occured");
}
let header = Header { let header = Header {
total_byte_count: total_byte_count, total_byte_count: total_byte_count,
sent_bytes: if wraparound { BUFFER_SIZE as u32 } else { total_byte_count as u32 }, sent_bytes: if wraparound { BUFFER_SIZE as u32 } else { total_byte_count as u32 },
overflow_occurred: overflow_occurred, error_occurred: overflow_occurred | bus_error_occurred,
log_channel: pl::csr::CONFIG_RTIO_LOG_CHANNEL as u8, log_channel: pl::csr::CONFIG_RTIO_LOG_CHANNEL as u8,
dds_onehot_sel: true // kept for backward compatibility of analyzer dumps dds_onehot_sel: true // kept for backward compatibility of analyzer dumps
}; };