M-Labs/artiq-zynq
10
1
Fork 19
Code Issues 12 Pull Requests 1 Releases Wiki Activity

rtio_clocking: added explicit bypass aliases

Browse Source
This commit is contained in:
mwojcik 2021-10-28 16:25:07 +08:00
parent 90b6dd3e85
commit 0de56e92bd
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/runtime/src/rtio_clocking.rs
View File

@ -30,6 +30,8 @@ fn get_rtio_clock_cfg(cfg: &Config) -> RtioClock {
"int_100" => RtioClock::Int_100, "int_100" => RtioClock::Int_100,
"int_150" => RtioClock::Int_150, "int_150" => RtioClock::Int_150,
"ext0_bypass" => RtioClock::Ext0_Bypass, "ext0_bypass" => RtioClock::Ext0_Bypass,
"ext0_bypass_125" => RtioClock::Ext0_Bypass,
"ext0_bypass_100" => RtioClock::Ext0_Bypass,
"ext0_synth0_10to125" => RtioClock::Ext0_Synth0_10to125, "ext0_synth0_10to125" => RtioClock::Ext0_Synth0_10to125,
"ext0_synth0_100to125" => RtioClock::Ext0_Synth0_100to125, "ext0_synth0_100to125" => RtioClock::Ext0_Synth0_100to125,
"ext0_synth0_125to125" => RtioClock::Ext0_Synth0_125to125, "ext0_synth0_125to125" => RtioClock::Ext0_Synth0_125to125,