M-Labs/artiq-zynq
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analyzer: use 32-bit byte_count

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Sebastien Bourdeauducq 2020-07-16 11:36:04 +08:00
parent 36338ea3b2
commit 0c6db0d12c
1 changed files with 2 additions and 2 deletions
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src/gateware/analyzer.py
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@ -19,7 +19,7 @@ class AXIDMAWriter(Module, AutoCSR):
# All numbers in bytes # All numbers in bytes
self.base_address = CSRStorage(aw, alignment_bits=alignment_bits) self.base_address = CSRStorage(aw, alignment_bits=alignment_bits)
self.last_address = CSRStorage(aw, alignment_bits=alignment_bits) self.last_address = CSRStorage(aw, alignment_bits=alignment_bits)
self.byte_count = CSRStatus(64) # only read when shut down self.byte_count = CSRStatus(32) # only read when shut down
self.make_request = Signal() self.make_request = Signal()
self.sink = stream.Endpoint([("data", dw)]) self.sink = stream.Endpoint([("data", dw)])
@ -71,7 +71,7 @@ class AXIDMAWriter(Module, AutoCSR):
) )
] ]
message_count = Signal(64 - log2_int(message_len//8)) message_count = Signal(32 - log2_int(message_len//8))
self.comb += self.byte_count.status.eq( self.comb += self.byte_count.status.eq(
message_count << log2_int(message_len//8)) message_count << log2_int(message_len//8))
self.sync += [ self.sync += [