M-Labs/artiq-zynq
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satman: drive SFP TX_DISABLE

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Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
This commit is contained in:
Egor Savkin 2023-02-17 17:19:30 +08:00 committed by sb10q
parent dcc5cc7555
commit 05c22792d6
4 changed files with 50 additions and 45 deletions
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48
src/runtime/src/io_expander.rs → src/libboard_artiq/src/io_expander.rs
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@ -1,4 +1,4 @@
use crate::i2c; use libboard_zynq::i2c;
use log::info; use log::info;
// Only the bare minimum registers. Bits/IO connections equivalent between IC types. // Only the bare minimum registers. Bits/IO connections equivalent between IC types.
@ -10,10 +10,9 @@ struct Registers {
gpiob: u8, // Output Port 1 gpiob: u8, // Output Port 1
} }
pub struct IoExpander { pub struct IoExpander<'a> {
busno: i32, i2c: &'a mut i2c::I2c,
port: u8, address: u8,
address: i32,
iodir: [u8; 2], iodir: [u8; 2],
out_current: [u8; 2], out_current: [u8; 2],
out_target: [u8; 2], out_target: [u8; 2],
@ -21,14 +20,13 @@ pub struct IoExpander {
} }
impl IoExpander { impl<'a> IoExpander<'a> {
pub fn new(index: u8) -> Result<Self, &'static str> { pub fn new(i2c: &'a mut i2c::I2c, index: u8) -> Result<Self, &'static str> {
// Both expanders on SHARED I2C bus // Both expanders on SHARED I2C bus
let mut io_expander = match index { let mut io_expander = match index {
0 => IoExpander { 0 => IoExpander {
busno: 0, i2c,
port: 11,
address: 0x40, address: 0x40,
iodir: [0xff; 2], iodir: [0xff; 2],
out_current: [0; 2], out_current: [0; 2],
@ -41,8 +39,7 @@ impl IoExpander {
}, },
}, },
1 => IoExpander { 1 => IoExpander {
busno: 0, i2c,
port: 11,
address: 0x42, address: 0x42,
iodir: [0xff; 2], iodir: [0xff; 2],
out_current: [0; 2], out_current: [0; 2],
@ -75,32 +72,31 @@ impl IoExpander {
Ok(io_expander) Ok(io_expander)
} }
fn select(&self) -> Result<(), &'static str> { fn select(&mut self) -> Result<(), &'static str> {
let mask: u16 = 1 << self.port; self.i2c.pca954x_select(0x70, None)?;
i2c::switch_select(self.busno, 0x70, mask as u8 as i32); self.i2c.pca954x_select(0x71, Some(3))?;
i2c::switch_select(self.busno, 0x71, (mask >> 8) as u8 as i32);
Ok(()) Ok(())
} }
fn write(&self, addr: u8, value: u8) -> Result<(), &'static str> { fn write(&mut self, addr: u8, value: u8) -> Result<(), &'static str> {
i2c::start(self.busno); self.i2c.start()?;
i2c::write(self.busno, self.address as i32); self.i2c.write(self.address)?;
i2c::write(self.busno, addr as i32); self.i2c.write(addr)?;
i2c::write(self.busno, value as i32); self.i2c.write(value)?;
i2c::stop(self.busno); self.i2c.stop()?;
Ok(()) Ok(())
} }
fn check_ack(&self) -> Result<bool, &'static str> { fn check_ack(&mut self) -> Result<bool, &'static str> {
// Check for ack from io expander // Check for ack from io expander
self.select()?; self.select()?;
i2c::start(self.busno); self.i2c.start()?;
let ack = i2c::write(self.busno, self.address); let ack = self.i2c.write(self.address)?;
i2c::stop(self.busno); self.i2c.stop()?;
Ok(ack) Ok(ack)
} }
fn update_iodir(&self) -> Result<(), &'static str> { fn update_iodir(&mut self) -> Result<(), &'static str> {
self.write(self.registers.iodira, self.iodir[0])?; self.write(self.registers.iodira, self.iodir[0])?;
self.write(self.registers.iodirb, self.iodir[1])?; self.write(self.registers.iodirb, self.iodir[1])?;
Ok(()) Ok(())

2
src/libboard_artiq/src/lib.rs
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@ -27,6 +27,8 @@ pub mod drtioaux_async;
#[cfg(has_drtio)] #[cfg(has_drtio)]
#[path = "../../../build/mem.rs"] #[path = "../../../build/mem.rs"]
pub mod mem; pub mod mem;
#[cfg(feature = "target_kasli_soc")]
pub mod io_expander;
use core::{cmp, str}; use core::{cmp, str};

30
src/runtime/src/main.rs
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@ -21,7 +21,7 @@ use nb;
use void::Void; use void::Void;
use libconfig::Config; use libconfig::Config;
use libcortex_a9::l2c::enable_l2_cache; use libcortex_a9::l2c::enable_l2_cache;
use libboard_artiq::{logger, identifier_read, pl}; use libboard_artiq::{logger, identifier_read, pl, io_expander};
const ASYNC_ERROR_COLLISION: u8 = 1 << 0; const ASYNC_ERROR_COLLISION: u8 = 1 << 0;
const ASYNC_ERROR_BUSY: u8 = 1 << 1; const ASYNC_ERROR_BUSY: u8 = 1 << 1;
@ -46,8 +46,6 @@ mod mgmt;
mod analyzer; mod analyzer;
mod irq; mod irq;
mod i2c; mod i2c;
#[cfg(feature = "target_kasli_soc")]
mod io_expander;
static mut SEEN_ASYNC_ERRORS: u8 = 0; static mut SEEN_ASYNC_ERRORS: u8 = 0;
@ -117,21 +115,17 @@ pub fn main_core0() {
#[cfg(feature = "target_kasli_soc")] #[cfg(feature = "target_kasli_soc")]
{ {
let (mut io_expander0, mut io_expander1) = (io_expander::IoExpander::new(0).unwrap(), io_expander::IoExpander::new(1).unwrap()); let i2c = unsafe { (&mut i2c::I2C_BUS).as_mut().unwrap() };
io_expander0.init().expect("I2C I/O expander #0 initialization failed"); for expander_i in 0..2 {
io_expander1.init().expect("I2C I/O expander #1 initialization failed"); let mut io_expander = io_expander::IoExpander::new(i2c, expander_i).unwrap();
io_expander.init().expect("I2C I/O expander #0 initialization failed");
// Actively drive TX_DISABLE to false on SFP0..3 // Actively drive TX_DISABLE to false on SFP0..3
io_expander0.set_oe(0, 1 << 1).unwrap(); io_expander.set_oe(0, 1 << 1).unwrap();
io_expander0.set_oe(1, 1 << 1).unwrap(); io_expander.set_oe(1, 1 << 1).unwrap();
io_expander1.set_oe(0, 1 << 1).unwrap(); io_expander.set(0, 1, false);
io_expander1.set_oe(1, 1 << 1).unwrap(); io_expander.set(1, 1, false);
io_expander0.set(0, 1, false); io_expander.service().unwrap();
io_expander0.set(1, 1, false); }
io_expander1.set(0, 1, false);
io_expander1.set(1, 1, false);
io_expander0.service().unwrap();
io_expander1.service().unwrap();
} }
let cfg = match Config::new() { let cfg = match Config::new() {

15
src/satman/src/main.rs
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@ -22,7 +22,7 @@ use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds, print, pri
use libsupport_zynq::ram; use libsupport_zynq::ram;
#[cfg(has_si5324)] #[cfg(has_si5324)]
use libboard_artiq::si5324; use libboard_artiq::si5324;
use libboard_artiq::{pl::csr, drtio_routing, drtioaux, logger, identifier_read}; use libboard_artiq::{pl::csr, drtio_routing, drtioaux, logger, identifier_read, io_expander};
use libcortex_a9::{spin_lock_yield, interrupt_handler, regs::{MPIDR, SP}, notify_spin_lock, asm, l2c::enable_l2_cache}; use libcortex_a9::{spin_lock_yield, interrupt_handler, regs::{MPIDR, SP}, notify_spin_lock, asm, l2c::enable_l2_cache};
use libregister::{RegisterW, RegisterR}; use libregister::{RegisterW, RegisterR};
#[cfg(feature = "target_kasli_soc")] #[cfg(feature = "target_kasli_soc")]
@ -449,6 +449,19 @@ pub extern fn main_core0() -> i32 {
let mut i2c = I2c::i2c0(); let mut i2c = I2c::i2c0();
i2c.init().expect("I2C initialization failed"); i2c.init().expect("I2C initialization failed");
#[cfg(feature = "target_kasli_soc")]
{
for expander_i in 0..2 {
let mut io_expander = io_expander::IoExpander::new(&mut i2c, expander_i).unwrap();
io_expander.init().expect("I2C I/O expander #0 initialization failed");
// Actively drive TX_DISABLE to false on SFP0..3
io_expander.set_oe(0, 1 << 1).unwrap();
io_expander.set_oe(1, 1 << 1).unwrap();
io_expander.set(0, 1, false);
io_expander.set(1, 1, false);
io_expander.service().unwrap();
}
}
#[cfg(has_si5324)] #[cfg(has_si5324)]
si5324::setup(&mut i2c, &SI5324_SETTINGS, si5324::Input::Ckin1, &mut timer).expect("cannot initialize Si5324"); si5324::setup(&mut i2c, &SI5324_SETTINGS, si5324::Input::Ckin1, &mut timer).expect("cannot initialize Si5324");