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8388018db7
Author | SHA1 | Date |
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Sebastien Bourdeauducq | 8388018db7 | |
Sebastien Bourdeauducq | b22d85ba52 |
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@ -1,67 +0,0 @@
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commit 23c32a1597df69083f4fa6fb932410cb342e266e
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Author: Sebastien Bourdeauducq <sb@m-labs.hk>
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Date: Tue Apr 9 00:15:31 2019 +0800
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add riscv32i
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diff --git a/src/librustc_target/spec/mod.rs b/src/librustc_target/spec/mod.rs
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index 46fefd78f4..181342db7d 100644
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--- a/src/librustc_target/spec/mod.rs
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+++ b/src/librustc_target/spec/mod.rs
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@@ -465,6 +465,7 @@ supported_targets! {
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("aarch64-unknown-hermit", aarch64_unknown_hermit),
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("x86_64-unknown-hermit", x86_64_unknown_hermit),
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+ ("riscv32i-unknown-none-elf", riscv32i_unknown_none_elf),
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("riscv32imc-unknown-none-elf", riscv32imc_unknown_none_elf),
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("riscv32imac-unknown-none-elf", riscv32imac_unknown_none_elf),
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("riscv64imac-unknown-none-elf", riscv64imac_unknown_none_elf),
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diff --git a/src/librustc_target/spec/riscv32i_unknown_none_elf.rs b/src/librustc_target/spec/riscv32i_unknown_none_elf.rs
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new file mode 100644
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index 0000000000..a015e16d93
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--- /dev/null
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+++ b/src/librustc_target/spec/riscv32i_unknown_none_elf.rs
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@@ -0,0 +1,31 @@
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+use crate::spec::{LinkerFlavor, LldFlavor, PanicStrategy,
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+ Target, TargetOptions, TargetResult};
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+
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+pub fn target() -> TargetResult {
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+ Ok(Target {
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+ data_layout: "e-m:e-p:32:32-i64:64-n32-S128".to_string(),
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+ llvm_target: "riscv32".to_string(),
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+ target_endian: "little".to_string(),
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+ target_pointer_width: "32".to_string(),
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+ target_c_int_width: "32".to_string(),
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+ target_os: "none".to_string(),
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+ target_env: String::new(),
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+ target_vendor: "unknown".to_string(),
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+ arch: "riscv32".to_string(),
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+ linker_flavor: LinkerFlavor::Lld(LldFlavor::Ld),
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+
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+ options: TargetOptions {
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+ linker: Some("rust-lld".to_string()),
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+ cpu: "generic-rv32".to_string(),
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+ max_atomic_width: Some(32),
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+ atomic_cas: true,
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+ features: "-m,-a,-c".to_string(),
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+ executables: true,
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+ panic_strategy: PanicStrategy::Abort,
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+ relocation_model: "static".to_string(),
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+ emit_debug_gdb_scripts: false,
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+ abi_blacklist: super::riscv_base::abi_blacklist(),
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+ .. Default::default()
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+ },
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+ })
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+}
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diff --git a/src/tools/build-manifest/src/main.rs b/src/tools/build-manifest/src/main.rs
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index 61cc78ad80..4364ef41f9 100644
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--- a/src/tools/build-manifest/src/main.rs
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+++ b/src/tools/build-manifest/src/main.rs
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@@ -92,6 +92,7 @@ static TARGETS: &[&str] = &[
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"powerpc-unknown-linux-gnu",
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"powerpc64-unknown-linux-gnu",
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"powerpc64le-unknown-linux-gnu",
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+ "riscv32i-unknown-none-elf",
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"riscv32imc-unknown-none-elf",
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"riscv32imac-unknown-none-elf",
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"riscv64imac-unknown-none-elf",
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@ -16,10 +16,11 @@ rec {
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heavycomps = pkgs.callPackage ./heavycomps.nix { inherit nmigen; };
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heavycomps = pkgs.callPackage ./heavycomps.nix { inherit nmigen; };
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binutils-riscv = pkgs.callPackage ./compilers/binutils.nix { platform = "riscv32"; };
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binutils-riscv32 = pkgs.callPackage ./compilers/binutils.nix { platform = "riscv32"; };
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binutils-riscv64 = pkgs.callPackage ./compilers/binutils.nix { platform = "riscv64"; };
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rust-riscv32imc-crates = pkgs.callPackage ./compilers/rust-riscv32imc-crates.nix { };
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rust-riscv32imc-crates = pkgs.callPackage ./compilers/rust-riscv32imc-crates.nix { };
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fw-helloworld = pkgs.callPackage ./firmware { inherit rust-riscv32imc-crates binutils-riscv; };
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fw-helloworld = pkgs.callPackage ./firmware { inherit rust-riscv32i-crates binutils-riscv32; };
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};
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};
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lib = {
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lib = {
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symbiflow = import ./eda/symbiflow.nix { inherit pkgs; inherit (drvs) yosys; };
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symbiflow = import ./eda/symbiflow.nix { inherit pkgs; inherit (drvs) yosys; };
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@ -1,4 +1,4 @@
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{ rustPlatform, rust-riscv32imc-crates, binutils-riscv }:
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{ rustPlatform, rust-riscv32i-crates, binutils-riscv32 }:
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rustPlatform.buildRustPackage rec {
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rustPlatform.buildRustPackage rec {
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name = "helloworld";
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name = "helloworld";
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@ -9,14 +9,14 @@ rustPlatform.buildRustPackage rec {
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buildPhase = ''
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buildPhase = ''
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export CARGO_HOME=$(mktemp -d cargo-home.XXX)
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export CARGO_HOME=$(mktemp -d cargo-home.XXX)
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export RUSTFLAGS="-L ${rust-riscv32imc-crates}/lib/rustlib/riscv32imc-unknown-none-elf/lib -C linker=${binutils-riscv}/bin/riscv32-unknown-elf-ld -C link-arg=-Tlink.x"
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export RUSTFLAGS="-L ${rust-riscv32i-crates}/lib/rustlib/riscv32i-unknown-none-elf/lib -C linker=${binutils-riscv32}/bin/riscv32-unknown-elf-ld -C link-arg=-Tlink.x"
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cargo build --release --target riscv32imc-unknown-none-elf
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cargo build --release --target riscv32imc-unknown-none-elf
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'';
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'';
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doCheck = false;
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doCheck = false;
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installPhase = ''
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installPhase = ''
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mkdir -p $out
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mkdir -p $out
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cp target/riscv32imc-unknown-none-elf/release/helloworld $out
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cp target/riscv32i-unknown-none-elf/release/helloworld $out
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${binutils-riscv}/bin/riscv32-unknown-elf-objcopy -O binary target/riscv32imc-unknown-none-elf/release/helloworld $out/helloworld.bin
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${binutils-riscv32}/bin/riscv32-unknown-elf-objcopy -O binary target/riscv32i-unknown-none-elf/release/helloworld $out/helloworld.bin
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'';
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'';
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}
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}
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@ -4,7 +4,4 @@ self: super:
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name = oa.name + "-riscv";
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name = oa.name + "-riscv";
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cmakeFlags = oa.cmakeFlags ++ ["-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=RISCV"];
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cmakeFlags = oa.cmakeFlags ++ ["-DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD=RISCV"];
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});
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});
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rustc = super.rustc.overrideAttrs(oa: {
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patches = oa.patches ++ [ ./compilers/rustc-riscv32i.patch ];
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});
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}
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}
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