Commit Graph

97 Commits (c7bda2b1449138a9e16ecd7b7b5d82b945d7e497)

Author SHA1 Message Date
Sebastien Bourdeauducq c7bda2b144 compile Rust core crate for riscv32i 2019-06-08 21:52:33 +08:00
Sebastien Bourdeauducq 03dc4f6e32 add RISCV GCC
Needed to refresh riscv and riscv-rt Rust crates.
2019-06-08 21:50:47 +08:00
Sebastien Bourdeauducq 033659344f Revert "Revert "reinstate riscv32i""
Custom rustc targets with JSON come with a messed up TARGET environment variable and lots of things break.

This reverts commit b22d85ba52.
2019-06-08 19:31:41 +08:00
Sebastien Bourdeauducq 8388018db7 also build riscv64 binutils 2019-06-08 19:25:38 +08:00
Sebastien Bourdeauducq b22d85ba52 Revert "reinstate riscv32i"
This reverts commit 06d825f63d.
2019-06-08 18:48:50 +08:00
Sebastien Bourdeauducq 06d825f63d reinstate riscv32i 2019-06-08 17:35:27 +08:00
Sebastien Bourdeauducq 75e9310097 simplesoc_ecp5: add simulation 2019-06-08 17:30:49 +08:00
Sebastien Bourdeauducq 83ffe66f70 simplesoc_ecp5: add blinking LED 2019-06-07 23:17:19 +08:00
Sebastien Bourdeauducq 2cfafcdf20 firmware: match simplesoc memory addresses 2019-06-07 23:17:03 +08:00
Sebastien Bourdeauducq ad4f00e93d simplesoc_ecp5: load firmware 2019-06-06 18:11:54 +08:00
Sebastien Bourdeauducq a53c470d17 nmigen: bump 2019-06-06 18:11:31 +08:00
Sebastien Bourdeauducq 713f644072 minerva: bump 2019-06-06 18:04:56 +08:00
Sebastien Bourdeauducq a203307108 reorganize 2019-06-06 17:25:11 +08:00
Sebastien Bourdeauducq 63664ab959 build .bin firmware image 2019-06-06 17:17:45 +08:00
Sebastien Bourdeauducq d2391e0aa1 build firmware with Nix 2019-06-06 13:19:17 +08:00
Sebastien Bourdeauducq b6c53406ea show LLVM in hydra 2019-06-06 12:24:48 +08:00
Sebastien Bourdeauducq 3edb51a646 fix syntax issue 2019-06-06 12:12:40 +08:00
Sebastien Bourdeauducq 85f7b2bf15 use overlay instead of passing llvm/rustc/cargo around 2019-06-06 12:05:48 +08:00
Sebastien Bourdeauducq 78f67f82d3 firmware: simulable demo
Run:
qemu-system-riscv32 -nographic -machine sifive_u -kernel target/riscv32imc-unknown-none-elf/release/helloworld
2019-06-06 10:33:29 +08:00
Sebastien Bourdeauducq b5ac2e7303 add simple Rust firmware (WIP) 2019-06-06 00:12:17 +08:00
Sebastien Bourdeauducq f707295646 use the GNU linker 2019-06-06 00:07:53 +08:00
Sebastien Bourdeauducq cf86c11dce binutils: use unknown-elf 2019-06-06 00:06:29 +08:00
Sebastien Bourdeauducq aa1c3726f3 attempt to use lld linker 2019-06-05 23:46:29 +08:00
Sebastien Bourdeauducq d5c288c20b rustc: disable lld 2019-06-05 23:42:39 +08:00
Sebastien Bourdeauducq 1361c6ae9e Revert "llvm: only build x86 and riscv"
This reverts commit b17ec6fb1f.
2019-06-05 23:41:22 +08:00
Sebastien Bourdeauducq b17ec6fb1f llvm: only build x86 and riscv
Attempting to fix llvm-lld breakage on msp430 by disabling msp430.
2019-06-05 23:19:51 +08:00
Sebastien Bourdeauducq 52cc7722a0 add nix-shell file for firmware compilation 2019-06-05 23:08:55 +08:00
Sebastien Bourdeauducq 6ad1d993c6 rustc: remove riscv32i support 2019-06-05 23:07:49 +08:00
Sebastien Bourdeauducq f929be260a build cargo 2019-06-05 23:06:57 +08:00
Sebastien Bourdeauducq 2c3fc22963 Use riscv32imc for Rust core crate
Some other crates have issues with riscv32i.
2019-06-05 23:06:03 +08:00
Sebastien Bourdeauducq 14c7b4890c rustc: enable lld 2019-06-05 23:05:15 +08:00
Sebastien Bourdeauducq d02da47167 minerva: bump 2019-05-25 12:23:17 +08:00
Sebastien Bourdeauducq 2f3c1824a6 nmigen: bump 2019-05-15 18:55:32 +08:00
Sebastien Bourdeauducq ec09c09cf3 rust-riscv32i-crates: use external compiler_builtins 2019-05-14 20:35:40 +08:00
Sebastien Bourdeauducq a0690fe0e2 rust-riscv32i-crates: disable compiler_builtins 2019-05-14 19:58:13 +08:00
Sebastien Bourdeauducq 9e93a9cf39 rustc: make llvm override compatible with nixos-unstable 2019-05-14 19:17:16 +08:00
Sebastien Bourdeauducq 9f4538555e fix previous commit 2019-05-14 19:16:52 +08:00
Sebastien Bourdeauducq e9b005d50a mark riscv rustc 2019-05-14 19:05:30 +08:00
Sebastien Bourdeauducq 677ddefff2 mark riscv llvm 2019-05-14 14:07:36 +08:00
Sebastien Bourdeauducq 351d5360f0 llvm -> llvm_7 for nixos-unstable rustc 2019-05-14 10:41:10 +08:00
Sebastien Bourdeauducq f7e7b894b7 simplesoc_ecp5: disable minerva muldiv 2019-05-13 00:46:52 +08:00
Sebastien Bourdeauducq 52f663eda6 minerva: bump 2019-05-13 00:46:43 +08:00
Sebastien Bourdeauducq 05822f0a36 simplesoc_ecp5: remove nmigen/#30 workaround 2019-05-12 15:01:45 +08:00
Sebastien Bourdeauducq c77c296e72 nmigen: bump 2019-05-12 14:58:08 +08:00
Sebastien Bourdeauducq e74b5dfe00 ecp5: use speed grade 8 (versa) 2019-05-06 22:44:58 +08:00
Sebastien Bourdeauducq 7ffce5882e add simplesoc_ecp5 to continuous build 2019-05-02 12:54:57 +08:00
Sebastien Bourdeauducq 5bc9189709 add simplesoc_ecp5 (WIP) 2019-05-02 12:53:28 +08:00
Sebastien Bourdeauducq 70638e6d87 add wishbone components 2019-05-02 12:53:08 +08:00
Sebastien Bourdeauducq 88db84cfd7 uart: style 2019-05-02 12:52:29 +08:00
Sebastien Bourdeauducq d765dfb7b9 add __all__ 2019-05-01 17:05:19 +08:00