diff --git a/README.md b/README.md
index 6cab0a3..e3882fd 100644
--- a/README.md
+++ b/README.md
@@ -3,6 +3,8 @@ HeavyX
 
 A FPGA SoC framework embracing cutting-edge open source technologies (nMigen, Yosys, SymbiFlow, Minerva, Nix, Rust).
 
+This is work in progress!
+
 "Hello World" SoC demo
 ----------------------
 
@@ -38,4 +40,4 @@ Load the bitstream ``openocd -f versa.cfg -c "transport select jtag; init; svf r
 
 Watch the UART output at 115200bps.
 
-Questions, comments: https://forum.m-labs.hk/
+Questions, comments: https://forum.m-labs.hk/ or IRC #m-labs on Freenode.