From 466eed2df9446cd845efb33f316c8ffa86c0c69a Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Mon, 24 Jun 2019 18:26:44 +0800
Subject: [PATCH] README: add nMigen link

---
 README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/README.md b/README.md
index 4313297..790f385 100644
--- a/README.md
+++ b/README.md
@@ -10,6 +10,7 @@ This is work in progress!
 
 Softcore system-on-chip on the Lattice ECP5 Versa board, built with a 100% Verilog/VHDL-free and 100% open source toolchain.
 
+* Everything written in nMigen (https://github.com/m-labs/nmigen/).
 * RISC-V 32-bit pipelined core (Minerva by Lambdaconcept).
 * 100MHz clock frequency.
 * Runs a Rust "hello world" program.