README: add nMigen link

2019-06-24 18:26:44 +08:00 · 2019-06-24 18:26:44 +08:00 · 466eed2df9
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@ -10,6 +10,7 @@ This is work in progress!

 Softcore system-on-chip on the Lattice ECP5 Versa board, built with a 100% Verilog/VHDL-free and 100% open source toolchain.

+* Everything written in nMigen (https://github.com/m-labs/nmigen/).
 * RISC-V 32-bit pipelined core (Minerva by Lambdaconcept).
 * 100MHz clock frequency.
 * Runs a Rust "hello world" program.