diff --git a/examples/simplesoc_ecp5.py b/examples/simplesoc_ecp5.py
index fa77d38..1983c56 100644
--- a/examples/simplesoc_ecp5.py
+++ b/examples/simplesoc_ecp5.py
@@ -45,22 +45,6 @@ class Top(Elaboratable):
                 (lambda a:  a[20], uart.bus)
             ], register=True)
 
-        # work around https://github.com/m-labs/nmigen/issues/30
-        m.d.comb += [
-            cpu.external_interrupt.eq(0),
-            cpu.timer_interrupt.eq(0),
-            cpu.fetch.ibus.dat_w.eq(0),
-            cpu.fetch.ibus.sel.eq(0b1111),
-            cpu.fetch.ibus.we.eq(0),
-            cpu.fetch.ibus.cti.eq(0),
-            cpu.fetch.ibus.bte.eq(0),
-            cpu.loadstore.dbus.cti.eq(0),
-            cpu.loadstore.dbus.bte.eq(0),
-            ram.bus.err.eq(0),
-            uart.bus.err.eq(0),
-            uart.bus.dat_r.eq(0)
-        ]
-        
         return m