forked from M-Labs/nac3
nac3artiq: enables inlining
This commit is contained in:
parent
1f3aa48361
commit
c98f367f90
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@ -4,6 +4,7 @@ use std::process::Command;
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use std::sync::Arc;
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use inkwell::{
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memory_buffer::MemoryBuffer,
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passes::{PassManager, PassManagerBuilder},
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targets::*,
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OptimizationLevel,
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@ -301,8 +302,8 @@ impl Nac3 {
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.call0()
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.unwrap()
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.get_item("virtual")
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.unwrap(),
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)).unwrap()
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.unwrap(),))
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.unwrap()
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.extract()
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.unwrap(),
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generic_alias: (
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@ -521,52 +522,17 @@ impl Nac3 {
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};
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let isa = self.isa;
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let working_directory = self.working_directory.path().to_owned();
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let f = Arc::new(WithCall::new(Box::new(move |module| {
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let builder = PassManagerBuilder::create();
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builder.set_optimization_level(OptimizationLevel::Default);
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let passes = PassManager::create(());
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builder.populate_module_pass_manager(&passes);
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passes.run_on(module);
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let (triple, features) = match isa {
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Isa::Host => (
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TargetMachine::get_default_triple(),
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TargetMachine::get_host_cpu_features().to_string(),
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),
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Isa::RiscV32G => (
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TargetTriple::create("riscv32-unknown-linux"),
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"+a,+m,+f,+d".to_string(),
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),
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Isa::RiscV32IMA => (
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TargetTriple::create("riscv32-unknown-linux"),
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"+a,+m".to_string(),
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),
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Isa::CortexA9 => (
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TargetTriple::create("armv7-unknown-linux-gnueabihf"),
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"+dsp,+fp16,+neon,+vfp3".to_string(),
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),
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};
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let target =
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Target::from_triple(&triple).expect("couldn't create target from target triple");
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let target_machine = target
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.create_target_machine(
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&triple,
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"",
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&features,
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OptimizationLevel::Default,
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RelocMode::PIC,
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CodeModel::Default,
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)
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.expect("couldn't create target machine");
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target_machine
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.write_to_file(
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module,
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FileType::Object,
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&working_directory.join(&format!("{}.o", module.get_name().to_str().unwrap())),
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)
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.expect("couldn't write module to file");
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let membuffers: Arc<Mutex<Vec<Vec<u8>>>> = Default::default();
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let membuffer = membuffers.clone();
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let f = Arc::new(WithCall::new(Box::new(move |module| {
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let buffer = module.write_bitcode_to_memory();
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let buffer = buffer.as_slice().into();
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membuffer.lock().push(buffer);
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})));
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let thread_names: Vec<String> = (0..4).map(|i| format!("module{}", i)).collect();
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let thread_names: Vec<String> = (0..4).map(|_| "main".to_string()).collect();
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let threads: Vec<_> = thread_names
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.iter()
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.map(|s| Box::new(ArtiqCodeGenerator::new(s.to_string(), self.time_fns)))
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@ -578,12 +544,79 @@ impl Nac3 {
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registry.wait_tasks_complete(handles);
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});
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let buffers = membuffers.lock();
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let context = inkwell::context::Context::create();
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let main = context
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.create_module_from_ir(MemoryBuffer::create_from_memory_range(&buffers[0], "main"))
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.unwrap();
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for buffer in buffers.iter().skip(1) {
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let other = context
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.create_module_from_ir(MemoryBuffer::create_from_memory_range(buffer, "main"))
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.unwrap();
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main.link_in_module(other)
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.map_err(|err| exceptions::PyRuntimeError::new_err(err.to_string()))?;
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}
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let mut function_iter = main.get_first_function();
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while let Some(func) = function_iter {
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if func.count_basic_blocks() > 0 && func.get_name().to_str().unwrap() != "__modinit__" {
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func.set_linkage(inkwell::module::Linkage::Private);
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}
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function_iter = func.get_next_function();
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}
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let builder = PassManagerBuilder::create();
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builder.set_optimization_level(OptimizationLevel::Aggressive);
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let passes = PassManager::create(());
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builder.set_inliner_with_threshold(255);
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builder.populate_module_pass_manager(&passes);
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passes.run_on(&main);
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let (triple, features) = match isa {
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Isa::Host => (
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TargetMachine::get_default_triple(),
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TargetMachine::get_host_cpu_features().to_string(),
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),
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Isa::RiscV32G => (
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TargetTriple::create("riscv32-unknown-linux"),
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"+a,+m,+f,+d".to_string(),
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),
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Isa::RiscV32IMA => (
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TargetTriple::create("riscv32-unknown-linux"),
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"+a,+m".to_string(),
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),
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Isa::CortexA9 => (
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TargetTriple::create("armv7-unknown-linux-gnueabihf"),
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"+dsp,+fp16,+neon,+vfp3".to_string(),
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),
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};
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let target =
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Target::from_triple(&triple).expect("couldn't create target from target triple");
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let target_machine = target
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.create_target_machine(
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&triple,
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"",
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&features,
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OptimizationLevel::Default,
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RelocMode::PIC,
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CodeModel::Default,
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)
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.expect("couldn't create target machine");
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target_machine
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.write_to_file(&main, FileType::Object, &working_directory.join("module.o"))
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.expect("couldn't write module to file");
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let mut linker_args = vec![
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"-shared".to_string(),
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"--eh-frame-hdr".to_string(),
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"-x".to_string(),
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"-o".to_string(),
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filename.to_string(),
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working_directory
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.join("module.o")
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.to_string_lossy()
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.to_string(),
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];
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if isa != Isa::Host {
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linker_args.push(
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@ -596,15 +629,7 @@ impl Nac3 {
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.unwrap(),
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);
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}
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linker_args.extend(thread_names.iter().map(|name| {
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let name_o = name.to_owned() + ".o";
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self.working_directory
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.path()
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.join(name_o.as_str())
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.to_str()
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.unwrap()
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.to_string()
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}));
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if let Ok(linker_status) = Command::new("ld.lld").args(linker_args).status() {
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if !linker_status.success() {
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return Err(exceptions::PyRuntimeError::new_err(
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