From 676d07657a8e27e1a7bef59156592f9599c60da5 Mon Sep 17 00:00:00 2001 From: David Mak Date: Mon, 11 Sep 2023 13:12:46 +0800 Subject: [PATCH] core: Add target field to CodeGenLLVMOptions For specifying the target machine options when optimizing and linking. This field is currently unused but will be required in a future commit. --- nac3artiq/src/lib.rs | 1 + nac3core/src/codegen/mod.rs | 4 ++++ nac3core/src/codegen/test.rs | 6 ++++-- nac3standalone/src/main.rs | 19 ++++++------------- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/nac3artiq/src/lib.rs b/nac3artiq/src/lib.rs index 79e0525a3..4705999bb 100644 --- a/nac3artiq/src/lib.rs +++ b/nac3artiq/src/lib.rs @@ -902,6 +902,7 @@ impl Nac3 { deferred_eval_store: DeferredEvaluationStore::new(), llvm_options: CodeGenLLVMOptions { opt_level: OptimizationLevel::Default, + target: Nac3::get_llvm_target_options(isa), emit_llvm: false, } }) diff --git a/nac3core/src/codegen/mod.rs b/nac3core/src/codegen/mod.rs index 32891ce3b..c741aa63a 100644 --- a/nac3core/src/codegen/mod.rs +++ b/nac3core/src/codegen/mod.rs @@ -65,6 +65,10 @@ lazy_static!( pub struct CodeGenLLVMOptions { /// The optimization level to apply on the generated LLVM IR. pub opt_level: OptimizationLevel, + + /// Options related to the target machine. + pub target: CodeGenTargetMachineOptions, + /// Whether to output the LLVM IR after generation is complete. pub emit_llvm: bool, } diff --git a/nac3core/src/codegen/test.rs b/nac3core/src/codegen/test.rs index 32b2abf11..9511d741e 100644 --- a/nac3core/src/codegen/test.rs +++ b/nac3core/src/codegen/test.rs @@ -1,7 +1,7 @@ use crate::{ codegen::{ - concrete_type::ConcreteTypeStore, CodeGenContext, CodeGenLLVMOptions, CodeGenTask, - DefaultCodeGenerator, WithCall, WorkerRegistry, + concrete_type::ConcreteTypeStore, CodeGenContext, CodeGenLLVMOptions, + CodeGenTargetMachineOptions, CodeGenTask, DefaultCodeGenerator, WithCall, WorkerRegistry, }, symbol_resolver::{SymbolResolver, ValueEnum}, toplevel::{ @@ -224,6 +224,7 @@ fn test_primitives() { let llvm_options = CodeGenLLVMOptions { opt_level: OptimizationLevel::Default, + target: CodeGenTargetMachineOptions::from_host_triple(), emit_llvm: false, }; let (registry, handles) = WorkerRegistry::create_workers( @@ -409,6 +410,7 @@ fn test_simple_call() { let llvm_options = CodeGenLLVMOptions { opt_level: OptimizationLevel::Default, + target: CodeGenTargetMachineOptions::from_host_triple(), emit_llvm: false, }; let (registry, handles) = WorkerRegistry::create_workers( diff --git a/nac3standalone/src/main.rs b/nac3standalone/src/main.rs index 149d8105f..4b6756c34 100644 --- a/nac3standalone/src/main.rs +++ b/nac3standalone/src/main.rs @@ -10,8 +10,8 @@ use std::{borrow::Borrow, collections::HashMap, fs, path::Path, sync::Arc}; use nac3core::{ codegen::{ - concrete_type::ConcreteTypeStore, irrt::load_irrt, CodeGenLLVMOptions, CodeGenTask, - DefaultCodeGenerator, WithCall, WorkerRegistry, + concrete_type::ConcreteTypeStore, irrt::load_irrt, CodeGenLLVMOptions, + CodeGenTargetMachineOptions, CodeGenTask, DefaultCodeGenerator, WithCall, WorkerRegistry, }, symbol_resolver::SymbolResolver, toplevel::{ @@ -272,8 +272,10 @@ fn main() { let llvm_options = CodeGenLLVMOptions { opt_level, + target: CodeGenTargetMachineOptions::from_host_triple(), emit_llvm, }; + let task = CodeGenTask { subst: Default::default(), symbol_name: "run".to_string(), @@ -330,17 +332,8 @@ fn main() { builder.populate_module_pass_manager(&passes); passes.run_on(&main); - let triple = TargetMachine::get_default_triple(); - let target = Target::from_triple(&triple).expect("couldn't create target from target triple"); - let target_machine = target - .create_target_machine( - &triple, - "", - "", - opt_level, - RelocMode::Default, - CodeModel::Default, - ) + let target_machine = llvm_options.target + .create_target_machine(llvm_options.opt_level) .expect("couldn't create target machine"); target_machine .write_to_file(&main, FileType::Object, Path::new("module.o"))