nac3_sca/nix/llvm/llvm-future-riscv-abi.diff

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diff --git a/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
index 0aba18b20..9bb75e7f4 100644
--- a/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+++ b/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -33,6 +33,8 @@ ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
auto TargetABI = getTargetABI(ABIName);
bool IsRV64 = TT.isArch64Bit();
bool IsRV32E = FeatureBits[RISCV::FeatureRV32E];
+ bool IsRV32D = FeatureBits[RISCV::FeatureStdExtD];
+ bool IsRV32F = FeatureBits[RISCV::FeatureStdExtF];
if (!ABIName.empty() && TargetABI == ABI_Unknown) {
errs()
@@ -56,10 +58,10 @@ ABI computeTargetABI(const Triple &TT, FeatureBitset FeatureBits,
if (TargetABI != ABI_Unknown)
return TargetABI;
- // For now, default to the ilp32/ilp32e/lp64 ABI if no explicit ABI is given
- // or an invalid/unrecognised string is given. In the future, it might be
- // worth changing this to default to ilp32f/lp64f and ilp32d/lp64d when
- // hardware support for floating point is present.
+ if (IsRV32D)
+ return ABI_ILP32D;
+ if (IsRV32F)
+ return ABI_ILP32F;
if (IsRV32E)
return ABI_ILP32E;
if (IsRV64)